Table of Contents
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Pin No.
Pin Name
A11, A10
48, 49
VSS
50
VDD
51
A03 to A00
52 to 55
A04 to A08
56 to 60
XOE
61
XCAS
62
VSS
63
XCS
64
A09
65
XRAS
66
XWE
67
D1, D0
68, 69
D2, D3
70, 71
D4 to D6
72 to 74
VSS
75
D7
76
ERR
77
EXTC2R
78
BUSY
79
EMP
80
FUL
81
EQL
82
MDLK
83
CPSY
84
CTMD0
85
CTMD1
86
SPO
87
VSS
88
MDSY
89
LRCK
90
BCK
91
C2PO
92
DATA
93
DIDT
94
DODT
95
DIRCPB
96
MIN
97
SPOSL
98
MCK
99
VSS
100
I/O
Address signal output. Not used in this unit (Opened)
O
—
Ground pin
Power supply pin (+5V)
—
O
Output of address signal to RAM (IC272)
O
O
Output of output enable control signal to RAM (IC272)
Output of column address strobe signal to RAM (IC272)
O
—
Ground pin
O
Output of chip select signal to RAM (IC272). Not used in this unit (Opened)
O
Output of address signal to RAM (IC272)
O
Output of row address strobe signal to RAM (IC272)
O
Output of read/write control signal to RAM (IC272)
I/O
Input/output pin of data signal to/from RAM (IC272)
I/O
I/O
Data signal input/output pin. Not used in this unit (Opened)
—
Ground pin
I/O
Data signal input/output pin. Not used in this unit (Opened)
I/O
Input/output pin of error (C2PO) data to external RAM. Not used in this unit (Opened)
I
External RAM selection input for error data writing ("H": External RAM). (Fixed at "L")
RAM access BUSY signal output. Not used in this unit (Opened)
O
EMPTY or immediately before FULL of ATRAC data (When DSC=ASC+1: "H").
O
Not used in this unit (Opened)
FULL or immediately before EMPTY of ATRAC data (When ASC=DSC+1: "H").
O
Not used in this unit (Opened)
O
ATRAC data EMPTY (When DSC=ASC: "H"). Not used in this unit
Indicates recording/playback data main/sub ("H": Sub, Linking: "L": Main). Not used in
O
this unit
Interpolation sync signal output. Not used in this unit
O
O
DSC counter mode output. Not used in this unit
O
O
Output of system clock (512fs=22.5792 MHz) signal to CXD2535BR (IC121)
Ground pin
—
O
Main data sync detection signal output. Not used in this unit
Input of L/R clock signal from CXD2535BR (IC121) (44.1 kHz)
I
I
Input of bit clock signal from CXD2535BR (IC121) (2.8224 MHz)
Input of C2PO signal from CXD2535BR (IC121) (Shows data error status)
I
Playback:C2PO ("H"). Digital recording: D.In-Vflag. Analog recording: "L"
Recording:Output of recording audio data signal to CXD2535BR (IC121)
I/O
Playback:Input of playback audio data signal from CXD2535BR (IC121)
Input of digital audio input 16-bit data from CXD2535BR (IC121)
I
O
Output of digital audio output 16-bit data to CXD2535BR (IC121)
Disc drive and EFM encoder/decoder recording/playback mode output. Not used in this unit
O
I
Input of defect ON/OFF switching signal from CXD2535BR (IC121)
Pin 87 (SPO) input/output switching input pin ("L":IN. "H":OUT). (Fixed at "H")
I
O
RAM controller internal master clock output pin. Not used in this unit
Ground pin
—
— 57 —
Function
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