Sony MDS-JA30ES Service Manual page 38

• IC203 Dig ital Audio Interf ace Recei ver (LC89051V -TLM)/DIG boar d
Pin No. Pin Name I/O
1 DIN1 I
2 DIN2 I
3 E/DOUT O
4 VDD —
5 R I
6 VIN I
7 VCO O
8 GND —
9 CKSEL I
10 XMODE I
11 AVOCK I
12 TST1 I
13 TST2 I
14 SCLK I
15 XLAT I
16 SWDT I
17 SRDT O
18 DQSY O
19 CKOUT O
20 FS128 O
21 BCK O
22 LRCK O
23 DATAOUT O
24 ERROR O
Data input with built-in amplifier (responding to the coaxial optical module)
Data input (responding to the optical module) (Not used)
Emphasis, input bi-phase, validity flag output (Not used)
Power supply (+5V)
VCO gain control input
VCO freerunning frequency setting input
LPF setting of PLL
Ground
System clock select input (384fs, 512fs) (Fixed at "H")
Reset input
Clock input for preventing PLL lock failure
Test input (Normally "L")
Microcomputer IF clock input
Microcomputer IF latch/chip enable input
Microcomputer IF write data input
Microcomputer IF read data output
Microcomputer IF Sub-Q sync and ID sync output
VCO clock output (freerunning, 384fs, 512fs)
128fs clock output (Not used)
Bit clock output
L/R clock output
Audio data output
PLL lock error mute output
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Description