Integrated Peripherals - SOYO SY-7IWB User Manual

Socket 370 celeron processor supported fw82810 agp/pci/amr 66/100 mhz front side bus supported baby at form factor
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BIOS Setup Utility

3-5 INTEGRATED PERIPHERALS

Caution: Change these settings only if you are already familiar
with the Chipset.
The [INTEGRATED PERIPHERALS] option changes the values of the
chipset registers. These registers control the system options in the
computer.
The following screen shows setup default settings.
CMOS Setup Utility – Copyright ( C ) 1984-1999 Award Software
On-Chip Primary
On-Chip Secondary PCI IDE
IDE Primary Master PIO
IDE Primary Slave PIO
IDE Secondary Master PIO
IDE Secondary Slave PIO
IDE Primary Master UDMA
IDE Primary Slave UDMA
IDE Secondary Master UDMA
IDE Secondary Slave UDMA
USB Controller
USB Keyboard Support
Init Display First
IDE HDD Block Mode
Onboard FDC Controller
Onboard Serial Port 1
Onboard Serial Port 2
UART Mode Select
x RxD , TxD Active
x IR Transmittiion delay
x UR2 Duplex Mode
x Use IR Pins
Onboard Parallel Port
Parallel Port Mode
x EPP Mode Select
x ECP Mode Use DMA
PWRON After PWR-Fail
Game Port Address
Midi Port Address
x Midi Port IRQ
Enter:Select
áâàß:Move
F5:Previous Values
Integrated Peripherals
PCI IDE
Enabled
Enabled
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Enabled
Disabled
PCI Slot
Enabled
Enabled
3F8/IRQ4
2F8/IRQ3
Normal
Hi, Lo
Enabled
Half
IR-R x 2T x 2
378/IRQ7
SPP
EPP1.7
3
Off
201
Disabled
5
+/-/PU/PD:Value F10:Save
F6:Fail-Safe Defaults
64
5
Item Help
Menu Level 4
6
ESC:Exit
F1:General Help
F7: Optimized Defaults
SY-7IWB

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