Icom IC-F43GT Service Manual page 12

4-6-2 CPU (MAIN unit; IC22)
Pin Port
number name
13, 15, CENC0– Output the CTCSS/DTCS signals.
16 CENC2
Outputs the reference oscillator cor-
29 REF recting voltage. The voltage is applied
to the buffer amplifier (IC24, pin3).
Outputs strobe signals to the PLL IC
30 PLST
(IC21, pin 16).
Outputs
switching signal to the FM/PM switch
34 PMFM
(IC13, pin 5).
High: PM is selected.
I/O port for the serial data signals
35 MDIO from/to the base band IC (IC14, pin
11).
Outputs clock signal to the base band
36 MSCK
IC (IC14, pin 13).
Outputs serial data control signal to
37 MDIR
the base band IC (IC14, pin 14).
Input port for the transmitting MSK
38 MTCK clock signal from the base band IC
(IC14, pin 9).
Outputs MSK data for transmitting to
39 MTDT
the base band IC (IC14, pin 10).
Input port for the receiving MSK detec-
40 MRDF tion signal from the base band IC
(IC14, pin 12).
Outputs strobe signals to the D/A con-
41 DAST
vertor (IC12, pin 6).
43 SENC Output single tone encoder signal.
44 BEEP Outputs beep audio signals.
Input port for single tone decode signal
45 SDEC
from the base band IC (IC14, pin 21).
Input port for CTCSS/DTCS signal
46 CDEC
from the amplifier (IC19, pin 1).
Input port for the detect signal for con-
48 BATV
necting battery pack's voltage.
49 LVIN Input port for the PLL lock voltage.
Input port for the S-meter signal from
50 RSSI
the FM IF IC (IC9, pin 12).
51 Input port for the transceiver's internal
TEMP
temperature detecting signal.
Outputs shift signal for reference oscil-
69 CSFT
lator's frequency.
Outputs audio control signal.
70 AF Low: Outputs audio signals from
Description
the FM/PM modulation
speaker.
Pin Port
number name
74 PTT
75 NOIS
76 SO
78 SCK
79 CLI
80 CLO
82 ESDA
85 ESCL
86 S5C
86 T5C
87 R5C
88
TMUT
90 ULCK
4 - 6
Description
Input port for the PTT switch detection
signal.
Low: While the PTT
pushed.
Input port for the noise signal from the
FM IF IC (IC9, pin 13).
Outputs serial data to the PLL IC
(IC21, pin 15) and D/A convertor
(IC12, pin 8).
Outputs serial clock signal to the PLL
IC (IC21 pin 14), D/A convertor (IC12,
pin 7), etc.
Input port for the cloning data signal.
Outputs the cloning data signal.
I/O port for data signals from/to the
EEPROM (IC10, pin 5).
Outputs clock signal to the EEPROM
(IC10, pin 6).
Outputs the S5 regulator (Q26–Q28)
control signal.
Low: While the S5 regulator outputs
5 V voltage.
Outputs the T5 regulator (Q24) control
signal.
Low: While transmitting.
Outputs the R5 regulator (Q25) control
signal.
Low: While receiving.
Outputs the transmitting mute switch
control signal to the mute switch
(D29).
High: While muting.
Input port for the PLL unlock signal.
Low: The PLL circuit is unlocked.
switch is