Sony HCD-S550 Service Manual page 89

Pin No. Pin Name
VDDE
46
WMD1
47
VSS
48
49 WMD0
PAGE2
50
VSS
51
PAGE1, PAGE0
52, 53
BOOT
54
BTACT
55
BST
56
MOD1
57
58 MOD0
EXLOCK
59
VDDI
60
VSS
61
62, 63 A17, A16
A15 to A13
64 to 66
GP10
67
GP9
68
69 GP8
VDDI
70
VSS
71
D15 to D12
72 to 75
76 VDDE
D11 to D8
77 to 80
VSS
81
82 to 85 A9, A12 to A10
TDO
86
TMS
87
88 XTRST
TCK
89
TDI
90
VSS
91
92 to 97 A8 to A3
D7, D6
98, 99
VDDI
100
VSS
101
102 to 105 D5 to D2
VDDE
106
D1, D0
107, 108
A2, A1
109, 110
111 VSS
A0
112
PM
113
SDI3
114
I/O
—
Power supply terminal (+3.3V)
I
S-RAM wait mode setting terminal Fixed at "H" in this set
—
Ground terminal
I S-RAM wait mode setting terminal Fixed at "L" in this set
O
Page selection signal output terminal Not used
—
Ground terminal
O
Page selection signal output terminal Not used
I
Boot mode control signal input terminal Not used
O
Boot mode state display signal output terminal Not used
I
Boot trap signal input from the system controller
PLL input frequency selection signal input terminal
I
"L": 384fs, "H": 256fs (fixed at "H" in this set)
I Mode setting terminal
I
PLL lock error and data error flag input from the digital audio interface IC
—
Power supply terminal (+2.6V)
—
Ground terminal
O Address signal output terminal Not used
O
Address signal output to the S-RAM
O
L/R sampling clock signal (44.1 kHz) output to the D/A converter and stream processor
O
Decode signal output to the system controller
I Bit 1 input terminal of channel status from the digital audio interface IC
—
Power supply terminal (+2.6V)
—
Ground terminal
I/O
Two-way data bus with the S-RAM
— Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM
—
Ground terminal
O Address signal output to the S-RAM
O
Simple emulation data output terminal Not used
I
Simple emulation data input start/end detection signal input terminal Not used
I Simple emulation asychronous break input terminal Not used
I
Simple emulation clock signal input terminal Not used
I
Simple emulation data input terminal Not used
—
Ground terminal
O Address signal output to the S-RAM
I/O
Two-way data bus with the S-RAM
—
Power supply terminal (+2.6V)
—
Ground terminal
I/O Two-way data bus with the S-RAM
—
Power supply terminal (+3.3V)
I/O
Two-way data bus with the S-RAM
O
Address signal output to the S-RAM
— Ground terminal
O
Address signal output to the S-RAM
I
PLL reset signal input from the system controller "L": reset
I
Rear L-ch and R-ch audio serial data input from the digital audio processor
Description
"L": single chip mode, "H": use prohibition (fixed at "L" in this set)
HCD-S550/S880
89