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IC100
FLI10610H-AA
M3
R1
R620
0
AUD_IN_L1
AUD_OUT1_ L
SW_LOU T
M4
R2
R621
0
AUD_IN_R1
AUD_OUT1_ R
SW_ROU T
M1
T3
AUD_IN_L2
AUD_OUT2_ L
M2
T4
AUD_IN_R2
AUD_OUT2_ R
C61 1
0.47u F
N5
COMP_LI N
AUD_IN_L3
C61 2
0.47u F
M5
T1
COMP_RI N
AUD_IN_R3
AUD_OUT_HP_ L
C61 3
0.47u F
N3
T2
SIDE_LIN
AUD_IN_L4
AUD_OUT_HP_ R
N4
C61 4
0.47u F
SIDE_RI N
AUD_IN_R4
N1
AD1
R60 6
C61 5
0.47u F
220
PC_AUDIO_ L
AUD_IN_L5
AUDO_SPDIF_OU T
SPDIF_OU T
N2
C61 6
0.47u F
PC_AUDIO_ R
AUD_IN_R5
AB4
AUDO_I2SA_BC LK
MS_BCLK_AMP
R60 1
22
AC1
AC5
AUDIO_MASTER_CL K
AUD_MCLK0
AUDO_I2SA_ WCLK
MS_WCLK_AMP
C619
AB5
AC4
47pF
50V
AUD_MCLK1
AUDO_I2SA_DAT0
MS_DA T_AMP
READ Y
L6
AD2
SIF_R TN
AUDO_I2SB_DAT1
5V_ANN_CT L
AC2
AE2
MS_BCL K
AUDIN_I2S_BCLK
AUDO_I2SB_DAT2
5V_ANN_MNT
AB3
MS_WCL K
AUDIN_I2S_WCLK
AA4
AC3
+3.3V_C I
MS_DAT
AUDIN_I2S_DAT
AUDO_I2SB_BCL K
AD3
AUDO_I2SB_ WCLK
AA5
AUDIN_SPD IF_IN
AE1
AUDO_MUTE
L3
AUD_VREFP
L5
R3
C60 1
C60 2
C60 3
C60 4
AUD_VCM
LS_OUT_ L
47u F
0.1uF
10u F
0.1uF
L4
R4
16 V
16 V
16 V
16 V
C60 5
C60 6
AUD_VREFN
LS_OUT_ R
10u F
0.1uF
R5
16 V
16 V
LS_OU T_S W
+8V_MS P
C69 3
C69 4
0.01u F
3.3uF
C68 0
3.3uF
50 V
C67 6
C62 4
C62 8
C68 5
100u F
10u F
10u F
0.1uF
16 V
16 V
16 V
+5 V
READ Y
AVSUP
CAPL_ M
R62 8
R62 7
49
32
C61 8
ANA_IN1+
AHVSUP
62 K
1.5K
4.7uF
50
31
10 V
ANA_IN?
CAPL_ A
C61 0
ANA_IN2+
51
30
SC1_OUT_ L
C62 2
TV_LOUT_SC 1
52
29
C69 2
56p F
TESTE N
IC602
SC1_OUT_ R
TV_ROUT_SC 1
0.01u F
56p F
53
28
Q61 1
XTAL_I N
VREF1
SIF
MSP4458G-C 4
2SC3875 S
R61 7
XTAL_OUT
54
27
SC2_OUT_ L
DTV/MNT_LOUT_SC 2
0
55
26
R62 5
R62 6
X601
READ Y
TP
SC2_OUT_ R
DTV/MNT_ROU T_SC 2
24 K
470
56
25
18.432MH z
AUD_CL_OU T
NC4
NC5
57
24
NC3
58
23
NC6
NC2
59
22
D_CTR_ I/O_1
DACM_L
D_CTR_ I/O_0
60
21
DACM_R
61
20
ADR_SE L
VREF2
62
19
STANDBYQ
DACA_L
NC7
63
18
DACA_R
64
17
SCL1_5 V
SDA1_5 V
R60 4
S W_R ES ET
100
C60 9
4.7uF
10 V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
Full SCA RT 1
COMPONEN T
L102
3.3u H
TV_ROU T
C16 3
C10 3
1000p F
1000p F
READY
SCART1_RI N
R
R113 4
C121
C15 6
0 . 0 3 9 u F
5pF
1K
25V
READY
L
L101
3.3u H
TV_LOUT
C10 1
R112 1
C16 4
1000p F
1000p F
470 K
READY
Pr
R114 0
1K
JK101
SCART1_LI N
Pb
PSC003-0 3
C10 5
R110 5
C120
5pF
220 K
0 . 0 3 9 u F
25V
READY
AUDIO_R_OU T
1
SCART1_ B
2
AUDIO_R_IN
AUDIO_L_OUT
R110 3
Y
3
75
AUDIO_GND
4
5
B_GN D
AUDIO_L_IN
6
PPJ209-0 1
B_OUT
JK103
7
R110 6
I D
47 K
R124 5
8
1K
SCART1_I D
9
G_GN D
R1112
R124 7
18 K
3.3K
D2B_IN
READY
10
G_OUT
11
SCART1_ G
12
D2B_OU T
R110 7
RED_GN D
+3.3V_C I
13
75
RGB_GN D
14
R_ OUT
15
16
RGB_IO
R115 3
SYNC_GND 1
1K
17
SCART1_LIN K
SYNC_GND 2
18
C115
11.RGB Input
0.1uF
19
SYNC_OU T
16 V
SYNC_IN
20
SCART1_ R
JK104
COM_GN D
KCN-DS-1-008 9
21
R110 4
+3.3V_C I
+3.3V_C I
75
22
1.RE D
2.GR N
SHIELD
3.BLU
6
R114 7
1K
4.NC
1
11
R113 3
SCART1_F B
1K
7
C
2
12
B
Q10 2
7.GN C
C
R114 3
1K
2SC305 2
8
R1115
8.B_GN D
1K
B
E
3
13
Q10 1
9.G_GN D
2SC305 2
9
R110 1
75
R112 5
E
4
14
3.3K
11.GN D
12.SD A
10
5
15
R110 9
75
TUNER_VOU T
15.SCL
R1116
16
1%
470 K
5.DDC_GN D
SCART1_VI N
SCART1_VI N
6.SYNC_GN D
R110 2
D10 3
READY
75
Half SCART 2
10.R_ GND
L106
3.3u H
DTV/MNT_ROUT
C110
C16 5
1000p F
13.HSYN C
1000p F
READY
14.VSYN C
R114 5
1K
SCART2_RI N
C122
0 . 0 3 9 u F
25V
READY
GND
L105
3.3u H
DTV/MNT_LOUT
C10 9
C16 2
1000p F
1000p F
READY
R114 6
1K
SCART2_LI N
JK102
PSC003-0 3
C123
0 . 0 3 9 u F
25V
READY
AUDIO_R_OU T
1
AUDIO_R_IN
2
AUDIO_L_OUT
3
AUDIO_GND
4
B_GN D
5
AUDIO_L_IN
6
D142
7
B_OUT
KDS18 4
R112 3
0
A2
I D
C
8
G_GN D
D111
A1
REC_ 8
9
D2B_IN
READY
10
R112 4
47 K
R124 0
G_OUT
1K
11
SCART2_I D
D2B_OU T
12
R113 1
R123 8
RED_GN D
18 K
+3.3V_C I
3.3K
13
READY
14
RGB_GN D
R_ OUT
15
RGB_IO
16
R115 4
SYNC_GND 1
1K
17
SCART2_LIN K
18
SYNC_GND 2
RS-232C Inpu t
C114
SYNC_OU T
0.1uF
19
16 V
SYNC_IN
1 : D a t a c a r r i e r d e t e c
20
2 : RX
P_+12 V
21
COM_GN D
3 : TX
4 : D T R ( D a t a t e r m i n a l r e a d
22
5 : GND
R134 2
6 : D S R ( D a t a s e t r e a d y
SHIELD
47
R134 3
7 : RT S ( Req uest t o sen d)
E
330
8 : C T S ( C l e a r t o s e n d
R1119
2SA1504 S
9 : RI ( R i ng i n di c a to r)
75
C
Q10 3
B
R133 6
Q10 6
B
330
C
C
C111
P101
2SC305 2
R134 4
10u F
Q10 8
B
82
16 V
KCN-DS-1-008 8
2SC305 2
DTV/MNT_VOUT
E
C118
R134 5
E
220uF
470
1
16 V
6
2
7
3
8
SCART2_VI N
SCART2_VI N
4
9
5
10
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
Copyright©2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
TV_L/ROUT
PC Sound
SCART 1
TV_LOUT
B u f f er
Q60 5
JK601
MU TE Ctr l
2SC305 2
PEJ024-0 1
E_SP RING
P_+12 V
3
T_TERMINAL1
TV_ROU T
6A
R63 0
3.9K
7A
B_TERMINAL1
PC_AUDIO_ R
Q60 6
4
R_SP RING
C697
R62 3
2SC305 2
47pF
50V
220 K
5
T_SP RING
C
D60 1
TV_LOUT_SC 1
R63 1
B
Q60 1
7B
B_TERMINAL2
CDS3C30GT H
3.9K
2SC305 2
READY
PC_AUDIO_ L
R69 6
C68 4
R64 7
10u F
25 V
6B
T_TERMINAL2
C696
E
2.2K
47pF
R62 4
1K
50V
220 K
C64 3
SHIELD_PLATE
R65 1
8
D60 2
6800p F
R65 5
CDS3C30GT H
4.7K
470 K
READY
C
TV_ROUT_SC 1
B
Q60 3
2SC305 2
C68 1
R69 5
25 V
R64 9
2.2K
10u F
E
1K
R65 3
R66 1
4.7K
C64 7
470 K
6800p F
SCART 2
DTV/MNT_LOUT
B u f f er
MNT/DTV OUT
P_+12 V
DTV/MNT_ROUT
SPDIF OPTIC JAC K
OPTIO N
+5 V
+5 V
C
B
Q60 2
DTV/MNT_LOUT_SC 2
2SC305 2
R67 2
R64 8
E
1K
1K
JK602
C64 4
R65 2
JST1223-00 1
6800p F
SPDIF_OU T
4.7K
GN D
ZD60 1
C65 7
VCC
0.1uF
C
VINPUT
B
Q60 4
DTV/MNT_ROUT_SC 2
2SC305 2
FIX_PO LE
R65 0
E
1K
C64 8
R65 4
6800p F
4.7K
PWM AM P
L609
DA-8580
P_+16 V
EAP3831900 1
R63 5
5 .6
2S
2F
C67 1
390p F
1S
1F
C67 5
R68 7
C63 4
C67 0
C63 5
330u F
3 .3
0.1uF
0.1uF
0.1uF
C63 1
25 V
390p F
C67 8
0.01u F
R67 1
C66 3
22000p F
5 .6
C63 7
22000p F
C66 9
R67 0
1uF
100
SW_RESE T
1000p F
C66 5
BST1 A
42
NC_2
AUDIO_MASTER_CL K
1
C64 6
+1.8V
VDR1A
2
41
VDR2A
+3.3V_C I
/RESE T
40
BST2 A
22000p F
3
R64 4
L605
AD
4
39
PGND2A_ 2
5 .6
DA-8580
+1.8V
L608
VSS_I O
PGND2A_ 1
EAP3831900 1
5
38
MLB-201209-0120P-N 2
CLK_I
6
IC601
37
OUT2A_ 2
C65 1
2S
2F
OUT2A_ 1
390p F
C67 7
C63 2
CLK_O
7
36
VDD_IO
8
35
PVDD2A_ 2
100 pF
1000p F
EAN4158400 1
PVDD2A_ 1
C66 4
1S
1F
DGNDP LL
9
34
R64 6
C65 2
AGNDP LL
33
PVDD2B_ 2
390p F
3.3K
0.1uF
10
PVDD2B_ 1
R68 8
LFM
11
NTP3000 A
32
A VDDPLL
OUT2B_ 2
5 .6
12
31
DVDDPLL
13
30
OUT2B_ 1
NC_1
PGND2B_ 2
P_+16 V
14
29
C67 4
C66 8
C66 1
C64 0
10u F
0.1uF
10u F
0.1uF
6.3V
6.3V
+1.8V
C64 9
C63 0
C67 9
0.1uF
0.1uF
330u F
25 V
C65 3
C68 9
0.1uF
10u F
C65 4
22000p F
R68 0
220
MS_DA T_AMP
R67 8
220
MS_WCLK_AMP
R67 9
R68 9
220
MS_BCLK_AMP
AUDIO_MUTE
R64 5
100
0
SDA2_3.3 V
SCL2_3.3 V
R64 3
100
C691
C688
33pF
33pF
READ Y
READ Y
[SCART PIN8 ]
R117 9
3.9K
COMP_RI N
R117 8
P_+12 V
3.9K
COMP_LI N
3E
[RD]O_SP RING
4E [RD]CONTACT
2E
[RD]1P_CAN 2
5D [WH]C_LUG_L
2D [WH]1P_CAN
COMP_P r
5C [RD]C_LUG_L
2C
[RD]1P_CAN 1
R119 4
C
3
1K
2
5B
[BL]C_LUG_L
REC_8_CTRL 1
B
Q10 5
2SC305 2
2B
[BL]1P_CAN
E
1
COMP_P b
R119 5
3A
[GN]O_SPRIN G
C
3
Q10 4
1K
2 B
REC_8_CTRL 2
2SC305 2
4A [GN]CONTACT
E
1
2A
[GN]1P_CA N
R1122
0
COMP_ Y
GND
+3.3V_C I
RE ADY
C10 2
4.7pF
R115 9
1K
COMP_LIN K
C116
0.1uF
16 V
P_+5 V
IC102
KDS18 4
R133 3
D14 1
R115 5
22
AT24C02BN-10SU-1. 8
0
VGA_R
C10 8
4.7pF
D_SUB_SD A
C15 0
R133 5
1
8
0.1uF
22
VGA_G
2
7
+3.3V_C I
READY
R118 1
C10 6
3
6
4.7pF
100
R115 6
R117 7
R1114
4
5
0
100
R113 8
0
1K
RGB_LINK
C112
0.1uF
16 V
R133 4
22
VGA_B
C10 7
DS_H S
R117 4
4.7pF
1K
DS_V S
R118 0
1K
D_SUB_SC L
R115 7
R115 8
R116 3
R116 6
R117 5
4.7K
4.7K
75
75
75
IC103
74HC14 D
DS_H S
1
14
2
13
ROM DOWNLOAD FOR PD P
3
12
H_SYNC_P C
4
11
5
10
6
9
7
8
R1126
10
C14 8
PC_SER_DAT A
0.1uF
C126
C127
READY
270p F
220p F
50V
50V
R1127
READY
READY
10
C125
C124
D114
D12 0
270p F
220p F
50V
50V
READY
READY
PC_SER_CL K
SIDE CVBS & S_VIDE O
+3.3V _CI
JK105
+3.3 V_S TBY
+3.3V_S TBY
PPJ218-0 1
[YL]O_SPRING
I C101
4A
C14 1
MAX3232CD R
[YL]CONTAC T
0.1uF
C14 5
5A
C1 +
VCC
0.1uF
1
16
2A
[YL]U_CAN
t
C14 3
V+
GND
3B
[WH]C_LUG
2
15
0.1uF
2B
[WH]U_C AN
y
C1-
DOUT1
3
14
4C
[RD]O_SPR ING
)
C2 +
4
13
RIN1
5C
[RD]CONTACT
)
C14 4
R118 6
C2-
ROUT 1
100
0.1uF
5
12
2C
[RD]U_CAN
CHAPLIN_R X
C14 2
R118 7
0.1uF
V-
DIN1
100
6
11
CHAPLIN_TX
JK106
R116 4
R118 8
PSJ0 18-01
100
DOUT2
DIN2
100
7
10
1
GND_TE R
RIN2
ROUT 2
R116 5
8
9
2
C_LUG_S 1
100
R118 9
100
3
C_LUG_L1
DEBUG_R X
READY
R132 2
R134 7
4
C_LUG_S 2
100
0
UCOM_R X
PC_COMMAN D
1/16 W
5
C_LUG_L2
R118 4
5%
+3.3V_S TBY
100
6
NC1
7
COM1
R118 5
8
NO1
100
IC1013
NLASB3157DFT2 G
11
NO2
+3.3V_S TBY
10
COM2
SELEC T
B1
UART_SE L
6
1
DEBUG_T X
+3.3V _CI
9
NC2
VCC
5
2
GND
12
4.7K
C16 7
R1111
0.1uF
A
B0
SHIELD
16 V
4
3
UCOM_T X
+3.3V_DOUGLA S
IC100
FLI10610H-AA
D24
LBADC_33
UART0_RXD
C901 0
0.1uF
UART0_TXD
E23
LBADC_GND
AR90 1
R66 5
1K
UART1_RXD
C25
1/16 W
LBADC_IN1
UART1_TXD
2K
C24
LBADC_IN2
UART1_RT S
Q60 9
+3.3V_C I
B25
+5V
LBADC_IN3
UART1_CT S
RT1P14 1C-T112
B24
MUTE_LINE
SCART1_I D
LBADC_IN4
3
1
A25
R911
SCART2_I D
LBADC_IN5
2
C65 9
3.3K
A24
LBADC_IN6
R66 7
2K
0.1uF
F22
R910
3.3K
LBADC_RETUR N
R912
4.7K
AR903
R905
100
D21
4.7K
1/16W
2WIRE_M1_SD A
TV_LOUT
D20
SDA2_3.3 V
2WIRE_M1_S CL
SCL2_3.3 V
SCL1_5 V
SDA1_5 V
E20
2WIRE_M0_S CL
F20
2WIRE_M0_SD A
100R92 7
B12
D_SUB_SD A
2WIRE_S0_SD A
USB_PWRE N
100R92 8
A12
TV_ROU T
D_SUB_SC L
2WIRE_S0_SC L
AR904
USBPHY_PAD P
100
D12
1/16W
2WIRE_S1_SD A
USBPHY_PAD M
SDA_HDMI_S W
C12
2WIRE_S1_SC L
SCL_HDMI_S W
DDC_SDA_ 4
USBPHY_VRE S
E11
DDC_SCL_ 4
2WIRE_S2_SD A
D11
2WIRE_S2_SC L
A13
PWM3
B13
PWM2
C13
PWM1
D13
CI_E N
PWM0
Q60 7
R66 8
2SC305 2
D23
2K
RESE T
RESET_ N
RT1P14 1C-T112
Q61 0
MUTE_LINE_DTV
3
1
+5V
R66 9
2
C66 0
Q60 8
0.1uF
2SC305 2
2K
IC907
R96 9
R96 7
24LC51 2
47 K
47 K
READY
A0
R66 3
C68 2
R97 0
1
25 V
47 K
2.2K
10u F
DTV/MNT_LOUT
A1
2
R65 8
A2
470 K
3
R98 2
VSS
4.7K
4
C68 3
R66 4
25 V
+5V
2.2K
10u F
DTV/MNT_ROUT
R66 2
470 K
C901 6
C901 7
0.1uF
47u F
16 V
READY
IC901
TPS2042BDRG 4
GND
OC 1
1
8
I N
OUT1
2
7
EN1
OUT2
USB20-PWE 1
3
6
R93 6
0
EN2
OC 2
4
5
USB POWER ENABL E
LOW ACTIV E
L603
C65 6
R64 2
0.01u F
C63 9
R67 4
0.1uF
4.7K
C65 8
3 .3
0.47u F
R67 7
C63 8
3 .3
R68 6
0.1uF
C67 3
4.7K
0.01u F
4
L606
3
2
+3.3V_C I
1
L604
6602T25009 C
C921 0
C920 2
C921 1
C920 9
C920 4
+5V
C66 7
JK603
4 . 7 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
6.3V
16V
16V
16V
16V
C66 6
C64 1
R64 1
0.01u F
P90 1
12505WS-06A0 0
0.47u F
0.1uF
4.7K
R64 0
3 .3
R988
R63 6
1
US B20-1-DM
0
3 .3
R987
C65 0
R67 3
USB20-1-D P
0
0.1uF
4.7K
C67 2
2
0.01u F
BLUE-DM
L610
BLUE-DP
3
BLUE-DM
USB_HU B
4
5
BLUE-DP
6
7
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
AUDI O
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
IC100
FLI10610H-AA
AH6
AG7
HOST_D[0]
FE_TS_DA T A_V AL
CDI0_VALI D
POD_HOST_D 0
HOST_D[1]
FE_TS_DA T A_CL K
AH7
AJ8
AJ6
CDI0_CLK
POD_HOST_D 1
AG8
HOST_D[2]
FE_TS_DA T A_SY N
CDI0_SYN C
POD_HOST_D 2
HOST_D[3]
FE_TS_DATA[0]
AJ7
AE7
AJ5
CDI0_D0
POD_HOST_D 3
AH9
HOST_D[4]
CDI0_ERRO R
POD_HOST_D 4
HOST_D[5]
3
AF9
POD_HOST_D 5
AJ10
HOST_D[6]
2
C
Q10 7
POD_HOST_D 6
HOST_D[7]
B
FLASH_W P
W1
AG10
2SC305 2
W2
OOB_CT X
POD_HOST_D 7
AF7
OOB_CR X
HOST_D 8
E
1
W3
AH8
REC_ 8
OOB_DR X
HOST_D 9
AE8
HOST_D1 0
AJ9
W6
HOST_D1 1
AG9
4.89V / 9.09V_120ohm(LOAD )
CI_MCLKO
POD_VS2_MCLK O
HOST_D1 2
AE9
AD4
HOST_D1 3
AH10
5.19V / 10.91V_1Kohm(LOAD )
CI_DE T
POD_D ETE CT_N
HOST_D1 4
AD5
AF10
CI_DAT_DIR
POD_DIR_ N
HOST_D1 5
POD_A[4 ]
AE3
AJ15
HOST_A[0]
POD_A4_CT X
POD_HOST_A 0
HOST_A[1]
HOST_A[0 ]
POD_A[5 ]
AF3
POD_A5_IT X
POD_HOST_A 1
AH15
HOST_A[1 ]
AF2
AG15
HOST_A[2]
POD_A[6 ]
POD_A6_ ETX
POD_HOST_A 2
HOST_A[3]
HOST_A[2 ]
POD_A[7 ]
AG2
POD_A7_QT X
POD_HOST_A 3
AE14
HOST_A[3 ]
AF1
AF14
HOST_A[4]
POD_A[8 ]
POD_A8_CR X
PODREG_HOST_A 4
HOST_A[5]
HOST_A[4 ]
POD_A[9 ]
AG1
AG14
HOST_A[5 ]
POD_A9_DR X
POD_IOWR_HOST_A 5
AH14
HOST_A[6]
POD_IORD_HOST_A 6
HOST_A[7]
HOST_A[6 ]
AJ14
HOST_A[7 ]
W5
HOST_A 7
AE13
POD _A[14]
POD_A14_MCLK O
HOST_A 8
CI_MOV AL
Y5
AF12
Y4
POD_BVD2_MOV A L
HOST_A 9
AG12
HOST_A[10 ]
CI_MOSTR T
POD _BVD1_ MOS TRT
POD_HOST_A1 0
HOST_A[11]
HOST_A[10 ]
AH12
HOST_A[11 ]
AB1
POD_HOST_A1 1
AJ12
HOST_A[12 ]
CI_MDO[7]
POD_D15_MDO 7
POD_HOST_A1 2
HOST_A[13 ]
HOST_A[12 ]
CI_MDO[6]
AA1
AE11
HOST_A[13 ]
Y1
POD_D14_MDO 6
POD_HOST_A1 3
AF11
CI_MDO[5]
POD_D13_MDO 5
HOST_A1 4
CI_MDO[4]
AB2
AG11
AA2
POD_D12_MDO 4
HOST_A1 5
AH11
CI_MDO[3]
POD_D11_MDO 3
HOST_A1 6
CI_MDO[2]
Y2
AE10
AA3
POD_D10_MDO 2
HOST_A1 7
AF13
R402
R401
CI_MDO[1]
POD _D9_ MDO1
HOST_A1 8
4.7K
4.7K
CI_MDO[0]
Y3
AG13
READ Y
READ Y
POD _D8_ MDO0
HOST_A1 9
AE12
HOST_A2 0
AD13
HOST_A2 1
CI_WAIT
V3
POD_WAIT_ N
HOST_A2 2
AH13
AJ11
HOST_A2 3
CI_CD 1
V5
POD_CD_ 1
HOST_A2 4
AD9
V4
R429
R430
CI_CD 2
POD_CD_ 2
4.7K
4.7K
POD_ WE_HOS T_WR
AJ13
HOST_W E
AE4
AF8
CI_CE1
POD_CE_ 1
POD_OE_HOST_R D
HOST_O E
CI_CE2
W4
POD_CE_ 2
AG3
HOST_AC K
HOST_AC K
CI_IRQ
R40 3
V2
22
V1
POD_READY_IRQ_ N
AE5
CI_RS T
POD_RESE T
HOST_DEV_CS2_ N
AF4
HOST_DEV_CS1_ N
AJ4
HOST_DEV_CS0_ N
HOST_CS0_ N
AG6
HOST_AC K
HOST_BOOT_CS_ N
AH5
HOST_READ Y
HOS T_RE ADY
HOST_READ Y
D_SUB_SC L
D_SUB_SD A
+3.3V_C I
READ Y
R40 5
R41 3
10 K
10 K
HOST_A[0 ]
HOST_A[0 ]
READ Y
R40 6
R41 4
10 K
10 K
HOST_A[1 ]
HOST_A[1 ]
READ Y
R40 7
R41 5
10 K
10 K
HOST_A[2 ]
HOST_A[2 ]
READ Y
R40 8
R41 6
10 K
10 K
HOST_A[3 ]
HOST_A[3 ]
READ Y
R40 9
R41 7
HOST_A[4 ]
10 K
10 K
HOST_A[4 ]
READ Y
10 K
R41 0
R41 8
10 K
HOST_A[5 ]
HOST_A[5 ]
READ Y
R41 1
R41 9
10 K
10 K
HOST_A[6 ]
HOST_A[6 ]
READ Y
+5 V
R41 2
R42 0
10 K
10 K
HOST_A[7 ]
HOST_A[7 ]
B o o t S t r a p S e t t i n g ( N O R F L A S H
B o o t , 1 6 b i t , I n t e r n a l O S C
DS_V S
V_SYNC_P C
+3.3V_C I
CI_DE T
IC402
74 LVC541A(P W)
C40 2
0.1uF
OE 1
VCC
16 V
1
20
FE_TS_DATA[7]
A0
OE 2
2
19
FE_TS_DATA[6]
A1
Y0
3
18
CI_MDI[ 7]
R1160
FE_TS_DATA[5]
A2
4
17
Y1
1K
SIDE_CVBS_LIN K
CI_MDI[ 6]
C119
FE_TS_DATA[4]
A3
COMMON INTERFACE
Y2
0 . 1 uF
5
16
16V
CI_MDI[ 5]
R130 6
BUFFE R
3.9K
SIDE_LIN
FE_TS_DATA[3]
A4
Y3
6
15
CI_MDI[ 4]
C161
100p F
FE_TS_DATA[2]
A5
Y4
R130 7
READY
7
14
CI_MDI[ 3]
3.9K
SIDE_RI N
C160
FE_TS_DATA[1]
A6
Y5
100p F
8
13
CI_MDI[ 2]
READY
FE_TS_DATA[0]
A7
9
12
Y6
CI_MDI[ 1]
FE_TS_DATA[0-7 ]
GND
Y7
10
11
CI_MDI[ 0]
SIDE_CI N
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
SIDE_YIN/SIDE_VIN
SPECIAL FEATURES IMPORTANT FOR PRO TECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
R1110
0
SIDE_S_S W
External Jack
A19
DEBUG_R X
B19
DEBUG_T X
+1.8V_DOUGLAS_DD R
A20
CHAPLIN_R X
B20
+3.3 V_S TBY
CHAPLIN_TX
C904 2
C904 7
C905 5
C906 2
C906 8
C907 2
C907 7
C908 2
C908 7
C20
R94 4
+3.3 V_S TBY
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0
6.3V
16V
16V
16V
16V
16V
16V
16V
16V
C19
0
R94 5
C919 9
0.1uF
16 V
P90 4
12505WS-08A0 0
+1.8V_DOUGLAS_DD R
B26
1
TRS T
2
B27
R95 7
3
TDI
A27
22
4
C904 5
C905 0
C906 4
C907 0
C907 4
C907 9
C908 4
TDO
5
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
A28
1/10 W
6.3V
16V
16V
16V
16V
16V
16V
5%
6
TMS
7
B28
TCK
8
A29
9
EJ_RST_N
B29
EJ_DINT
C902 0
33p F
+1.26V_DOUGLA S
+1.26V_ADC_DOUGLA S
50 V
C29
R913
USB_FLA G
US B20- OC1
0
C28
USB20-PWE 1
C915 4
C915 7
C915 5
C915 6
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
6.3V
16V
16V
16V
R985USB_HU B
AJ20
0
USBUP-D P
AH20
R986USB_HU B
0
USBUP-D M
+1.26V_DOUGLAS_ D
+1.26V_DOUGLA S
R989USB_HUB_BYPAS S
AG20
0
USB20-1-D P
R95 6
R990USB_HUB_BYPAS S
R914
C901 9
0
US B20-1-D M
0
6.2K
0.1uF
C903 1
C903 5
C903 9
C904 4
C904 9
C905 6
C906 3
C906 9
1%
16 V
C902 7
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
C21
6.3V
16V
16V
16V
16V
16V
16V
16V
16V
IRDATA
+3.3V_DOUGLA S
+3.3 V_IO_DOUGLAS
E13
DFSYN C
C902 9
C903 2
C903 6
C904 0
C904 6
C905 3
C906 0
C906 6
C902 6
A21
L910
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
PPW R
M LB-201209-0120 P-N2
6.3V
16V
16V
16V
16V
16V
16V
16V
16V
B21
PBIAS
+1.26V_DOUGLAS_ D
+1.26V_HDMI_DOUGLA S
+5V
+3.3 V_OTP
C909 0
C909 6
C910 3
C9114
C913 6
C908 5
R90 9
L921
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
M LB-201209-0120 P-N2
6.3V
16V
16V
16V
16V
16V
10 K
SW90 1
TMUE312GA B
1
2
RESE T
+3.3V_DOUGLA S
+3.3V_HDMI_DOUGLAS
VCC
C900 1
8
3
4
0.1uF
C915 3
0.1uF
5
16 V
WP
7
READY
C910 1
C9112
C912 2
R96 8
C909 5
SC L
22
L922
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
6
SCL1_5 V
M LB-201209-0120 P-N2
6.3V
16V
16V
16V
R97 1
SD A
22
5
SDA1_5 V
+1.26V_DOUGLAS_ D
+1.26V_AUD_DOUGLA S
C912 3
C913 4
C9113
L926
10uF
0 . 1 uF
0 . 1 uF
M LB-201209-0120 P-N2
6.3V
16V
16V
+3.3V_OTP
+3.3V_DOUGLA S
+3.3V_ADC_DOUGLA S
R98 4
4.7K
USB 2.0 Jac k
C9118
C912 8
C913 8
C910 4
L923
10uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
M LB-201209-0120 P-N2
6.3V
16V
16V
16V
L908
120-oh m
C902 5
+3.3V_DOUGLA S
+3.3 V_AUD_DOUGLAS
100uF
16 V
R96 1
0
C9119
C913 0
US B20- OC1
C910 9
L924
10uF
0 . 1 uF
0 . 1 uF
M LB-201209-0120 P-N2
6.3V
16V
16V
+1.26V_DOUGLAS_ D
+1.26V_DDRPL L
US B20-1-DM
USB20-1-D P
C905 4
C906 1
L919
0 . 1 uF
0 . 1 uF
M LB-201209-0120 P-N2
16V
16V
+3.3V_DOUGLA S
+3.3V_LVTX_DOUGLAS
+3.3V_ LVTX_PLL_DOUG LAS
R907
R908
C921 3
C921 4
0
0
C903 0
C903 3
C903 7
C905 1
33pF
33pF
50V
50V
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
R919
16V
16V
16V
16V
1M
X901
24MHz
+3.3V_C I
+3.3V_DOUGLA S
+1.26V_DOUGLAS_ D
C912 1
C913 1
C908 1
+3.3V_C I
C907 6
0 . 1 uF
0 . 1 uF
33uF
0 . 1 uF
C920 0
C920 5
16V
16V
10V
16V
1uF
0 . 1 uF
+5V
16V
16V
USB_HU B
+3.3V_DOUGLA S
+3.3V_DOUGLA S
+3.3V_DOUGLAS_VDD I
USBDN1_D M
1
27
VBUS_DE T
R922
100K
USB_HU B
N e a r b y p i n F23
USBDN1_D P
RESET_ N
2
26
C920 6
1uF
USBDN2_D M
3
25
HS_IND/CFG_SEL1
C920 1
16V
0 . 1 uF
C916 4
USBDN2_D P
4
24
SCL/SMBCLK/CFG_SEL 0
16V
C915 9
C905 2
C905 9
C916 2
C916 0
C916 1
L928
IC902
330u F
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
0 . 1 uF
M LB-201209-0120 P-N2
10uF
VDDA335
VDD33
6.3V
16V
16V
16V
16V
16V
6.3V
5
USB251 2
23
USB_HU B
NC6
6
22
SDA/SMBDATA/NON_REM1
C921 2
0 . 1 uF
NC7
NC21
16V
7
21
+3.3V_DOUGLA S
+3.3V_DAC_DOUGLA S
+3.3V_DOUGLA S
+3.3 V_DOUGLAS_VA A
NC8
8
20
NC20
NC9
9
19
NC19
R901
0
C903 4
C903 8
C902 8
C900 2
C919 7
L912
10uF
0 . 1 uF
0 . 1 uF
10uF
0 . 1 uF
M LB-201209-0120 P-N2
6.3V
16V
16V
6.3V
16V
+3.3V_OT P
+3.3V_DOUGLA S
C910 7
USB_HU B
USB_HU B
USB_HU B
C915 8
0 . 1 uF
+1.8V_DOUGLAS_DD R
C920 7
C920 8
C920 3
0 . 1 uF
16V
16V
1uF
0 . 1 uF
0 . 1 uF
16V
16V
16V
R964
390
1/10W
C
5%
Q902
B
2N3904 S
E
+3.3V_C I
IC405
74 LVC245 A
R47 1
DIR
R45 9
10 K
1
20
VCC
33
CI_DAT_DIR
CI_DE T
C41 2
CI_DATA[0]
A0
OE
2
19
0.1uF
CI_DATA[1]
A1
B0
HOST_D[0 ]
3
18
CI_DATA[2]
A2
COMMON INTERFACE
B1
HOST_D[1 ]
4
17
CI_DATA[3]
A3
5
16
B2
HOST_D[2 ]
Bidirec(High:A ->B)
CI_DATA[4]
A4
6
15
B3
HOST_D[3 ]
CI_DATA[5]
A5
B4
HOST_D[4 ]
7
14
CI_DATA[6]
A6
B5
HOST_D[5 ]
8
13
+3.3V_C I
CI_DATA[7]
A7
B6
HOST_D[6 ]
9
12
R424
R425
H/W OPTION(AD13, AH13)
GND
B7
HOST_D[7 ]
4.7K
4.7K
10
11
FHD_FR C
XGA_FR C
WXGA : R426,R427(00 )
X G A : R 4 2 6 , R 4 2 5 ( 0 1 )
GND
R422
4.7K
F H D : R 4 2 4 , R 4 2 7 ( 1 0 )
FR C
: R 4 2 4 , R 4 2 5 ( 11 )
R426
R427
H/W VERSION OPTION(AJ11, AD9 )
4.7K
4.7K
WXGA_XGA
WXGA_FH D
+3.3V_C I
R42 1
10 K
R42 3
10 K
+5V_CI
+5 V
)
C40 7
100u F
P40 1
16 V
CI_CD 1
C42 0
10067972-050L F
0.1uF
16 V
R44 6
35
COMMON INTERFACE
36
CI_DATA[3]
AR40 1
100
37
3
CI_DATA[4]
33
CI_DATA[5]
CI_MDO[4]
5
4
38
4
CI_MDO[5]
39
5
CI_DATA[6]
6
3
CI_DATA[7]
CI_MDO[6]
7
2
40
6
CI_MDO[7]
41
7
CI_CE1
R40 4
8
1
CI_ADDR[10]
CI_CE2
R43 7
42
8
0
43
9
CI_O E
READY
10 K
CI_ADDR[11]
CI_IOR D
44
10
45
11
CI_ADDR[9]
+5 V
CI_IOWR
COMMON INTERFACE
CI_ADDR[8]
AR40 2
46
12
33
47
13
CI_ADDR[13]
CI_MDI[ 0]
5
4
CI_ADDR[14]
CI_MDI[ 1]
48
14
6
3
49
15
CI_WE
CI_MDI[ 2]
7
2
R45 6
100
CI_MDI[ 3]
50
16
CI_IRQ
8
1
C40 4
51
COMMON INTERFACE
17
C41 9
R45 3
R45 4
0
AR40 3
GND
0.1uF
52
18
C41 1
0.1uF
33
0
READ Y
53
19
READ Y
16 V
CI_MDI[ 4]
0.1uF
GND
CI_MDI[ 5]
5
4
54
20
6
3
55
21
CI_ADDR[12]
GND
CI_MDI[ 6]
CI_ADDR[7]
CI_MDI[ 7]
7
2
56
22
8
1
R44 3
10 K
57
23
CI_ADDR[6]
COMMON INTERFACE
CI_ADDR[5]
58
24
CI_RS T
R43 5
47
CI_ADDR[4]
CI_WAIT
AR40 4
59
25
CI_ADDR[3]
60
26
RE G
COMMON INTERFACE
33
CI_ADDR[2]
CI_MCLKO
61
27
CI_ADDR[1]
CI_MOV AL
5
4
62
28
6
3
CI_ADDR[0]
HOST_A[0 ]
CI_MOSTR T
63
29
7
2
64
30
CI_DATA[0]
8
1
CI_DATA[1]
AR40 5
65
31
CI_ADDR[0-14 ]
CI_ADDR[7]
CI_MDO[0]
4
5
33
66
32
CI_DATA[2]
CI_MDO[1]
3
6
67
33
HOST_A[1 ]
CI_MDO[2]
2
7
68
34
CI_MDO[3]
1
8
2
1
G2
G1
CI_ADDR[6]
COMMON INTERFACE
R44 7
100
CI_CD 2
+5 V
GND
HOST_A[2 ]
GND
CI_ADDR[5]
GND
HOST_A[3 ]
10 K
C40 5
COMMON INTERFACE
R42 8
0.1uF
AR40 6
16 V
CI_ADDR[4]
33
1/16 W
1
8
CI_MISTRT
CI_MIVA L
2
7
3
6
CI_MCLKI
4
5
GND
IC100
FLI10610H-AA
+1.26V_DOUGLA S
L11
D26
CVDD12_ 1
CVSS _1
L12
D28
L17
CVDD12_ 2
CVSS _2
E24
CVDD12_ 3
CVSS _3
L18
E26
CVDD12_ 4
CVSS _4
L19
CVDD12_ 5
CVSS _5
E28
M11
G24
CVDD12_ 6
CVSS _6
M12
G26
M17
CVDD12_ 7
CVSS _7
G27
CVDD12_ 8
CVSS _8
M18
J 24
CVDD12_ 9
CVSS _9
M19
CVDD12_1 0
CVSS_1 0
J 26
V11
J 28
CVDD12_1 1
CVSS_1 1
V12
L13
V13
CVDD12_1 2
CVSS_1 2
L14
CVDD12_1 3
CVSS_1 3
V18
L15
CVDD12_1 4
CVSS_1 4
V19
CVDD12_1 5
CVSS_1 5
L16
W11
L24
CVDD12_1 6
CVSS_1 6
W12
L26
W13
CVDD12_1 7
CVSS_1 7
L28
CVDD12_1 8
CVSS_1 8
W18
M13
+3.3V_IO_DOUGLA S
CVDD12_1 9
CVSS_1 9
W19
CVDD12_2 0
CVSS_2 0
M14
M15
CVSS_2 1
F12
M16
F13
IOVDD33_1
CVSS_2 2
N11
IOVDD33_2
CVSS_2 3
F14
N12
IOVDD33_3
CVSS_2 4
F15
IOVDD33_4
CVSS_2 5
N13
F16
N14
IOVDD33_5
CVSS_2 6
F18
N15
F19
IOVDD33_6
CVSS_2 7
N16
IOVDD33_7
CVSS_2 8
AD8
N17
C907 3
C907 8
IOVDD33_8
CVSS_2 9
AD10
IOVDD33_9
CVSS_3 0
N18
0 . 1 uF
0 . 1 uF
AD11
N19
16V
16V
IOVDD33_1 0
CVSS_3 1
AD12
N27
AD14
IOVDD33_1 1
CVSS_3 2
N28
IOVDD33_1 2
CVSS_3 3
AD16
P11
AD17
IOVDD33_1 3
CVSS_3 4
P12
IOVDD33_1 4
CVSS_3 5
AD18
P13
IOVDD33_1 5
CVSS_3 6
U6
P14
V6
IOVDD33_1 6
CVSS_3 7
P15
IOVDD33_1 7
CVSS_3 8
Y6
P16
C907 1
C907 5
C904 8
C905 8
AA6
IOVDD33_1 8
CVSS_3 9
P17
C904 3
IOVDD33_1 9
CVSS_4 0
0 . 1 uF
0 . 1 uF
10uF
0 . 1 uF
0 . 1 uF
+1.26V_ADC_DOUGLA S
AB6
P18
16V
16V
6.3V
16V
16V
IOVDD33_2 0
CVSS_4 1
P19
A1
CVSS_4 2
P26
ADC_VDD12_ 1
CVSS_4 3
B2
R11
+3.3V_ADC_DOUGLA S
C3
ADC_VDD12_ 2
CVSS_4 4
R12
ADC_VDD12_ 3
CVSS_4 5
R13
CVSS_4 6
E4
R14
F4
ADC_VDDA33_ 1
CVSS_4 7
R15
ADC_VDDA33_ 2
CVSS_4 8
G4
R16
H4
ADC_VDDA33_ 3
CVSS_4 9
R17
ADC_VDDA33_ 4
CVSS_5 0
+1.26V_AUD_DOUGLA S
K4
R18
ADC_VDDA33_ 5
CVSS_5 1
+3.3V_AUD_DOUGLA S
R19
P6
CVSS_5 2
T11
AUD_AVDD12_ 1
CVSS_5 3
R6
T12
AUD_AVDD12_ 2
CVSS_5 4
T13
R90 2
22
C900 5
CVSS_5 5
L1
T14
SCART1_F B
C4P
CVSS_5 6
0.1uF
T6
T15
T5
AUD_AVDD33_ 2
CVSS_5 7
T16
AUD_AVDD33_ 3
CVSS_5 8
U5
T17
U4
AUD_AVDD33_ 4
CVSS_5 9
T18
AUD_AVDD33_ 5
CVSS_6 0
U3
T19
AUD_AVDD33_ 6
CVSS_6 1
T24
+1.26 V_DDRP LL
U2
CVSS_6 2
T26
AUD_HP_AVDD33
CVSS_6 3
U11
D22
CVSS_6 4
U12
DDRPLL_AVDD12
CVSS_6 5
U13
+1.8V_DOUGLAS_DD R
CVSS_6 6
D25
U14
D27
DDR_VDD_ 1
CVSS_6 7
U15
DDR_VDD_ 2
CVSS_6 8
D29
U16
F25
DDR_VDD_ 3
CVSS_6 9
U17
DDR_VDD_ 4
CVSS_7 0
F27
U18
DDR_VDD_ 5
CVSS_7 1
F29
U19
H24
DDR_VDD_ 6
CVSS_7 2
V14
DDR_VDD_ 7
CVSS_7 3
H27
V15
H29
DDR_VDD_ 8
CVSS_7 4
V16
DDR_VDD_ 9
CVSS_7 5
K25
V17
DDR_VDD_1 0
CVSS_7 6
K27
V29
K29
DDR_VDD_1 1
CVSS_7 7
W14
DDR_VDD_1 2
CVSS_7 8
M25
W15
M29
DDR_VDD_1 3
CVSS_7 9
W16
DDR_VDD_1 4
CVSS_8 0
N24
W17
DDR_VDD_1 5
CVSS_8 1
P28
W24
R25
DDR_VDD_1 6
CVSS_8 2
W26
DDR_VDD_1 7
CVSS_8 3
U25
W28
V27
DDR_VDD_1 8
CVSS_8 4
AA24
DDR_VDD_1 9
CVSS_8 5
Y25
AA26
DDR_VDD_2 0
CVSS_8 6
Y27
AA27
Y29
DDR_VDD_2 1
CVSS_8 7
AC24
DDR_VDD_2 2
CVSS_8 8
AB24
AC26
AB27
DDR_VDD_2 3
CVSS_8 9
AC28
DDR_VDD_2 4
CVSS_9 0
AB29
AE24
DDR_VDD_2 5
CVSS_9 1
AD25
AE26
AD27
DDR_VDD_2 6
CVSS_9 2
AE28
DDR_VDD_2 7
CVSS_9 3
AD29
AF25
DDR_VDD_2 8
D4
DDR_VDD_2 9
ADC_GND12_ 1
AF27
E5
DDR_VDD_3 0
ADC_GND12_ 2
AF29
F6
+3.3V_DOUGLA S
DDR_VDD_3 1
ADC_GND12_ 3
E22
F5
DDRPLL_AVDD33
ADC_GNDA_ 1
E3
+3.3V_DOUGLAS_VDD I
ADC_GNDA_ 2
F23
F1
DDR_VDDI_1
ADC_GNDA_ 3
AD23
G5
DDR_VDDI_2
ADC_GNDA_ 4
G3
ADC_GNDA_ 5
G25
H5
DDR2_VRE F
R24
DDR_VRF_ 0
ADC_GNDA_ 6
J5
DDR_VRF_ 1
ADC_GNDA_ 7
AA25
K5
DDR_VRF_ 2
ADC_GNDA_ 8
C900 3
R90 4
+3.3V_DOUGLAS_VA A
K3
SCART1_VI N
M28
A4P
0.1uF
DLL_VAA 0
22
V24
M6
C916 6
R977
R978
+3.3V_HDMI_DOUGLA S
DLL_VAA 1
AUD_AVSS12_ 1
N6
0 . 1 uF
510
10
AUD_AVSS12_ 2
C900 4
R90 3
C4
L2
HDMI_VDDA33_1
B4P
SIDE_CIN
D5
P1
0.1uF
22
D6
HDMI_VDDA33_2
AUD_AVSS33_ 2
P2
HDMI_VDDA33_3
AUD_AVSS33_ 3
E6
P3
E7
HDMI_VDDA33_4
AUD_AVSS33_ 4
P4
HDMI_VDDA33_5
AUD_AVSS33_ 5
+1.26V_HDMI_DOUGLA S
P5
AUD_AVSS33_ 6
D10
E8
HDMI_VDD12_1
U1
HDMI_VDD12_2
AUD_HP_AVSS33
E9
E10
HDMI_VDD12_3
E21
HDMI_VDD12_4
DDRP LL_AGND
+3.3V_LVTX_DOUGLAS
AE21
A2
AE22
LVTX_VDD33_1
HDMI_GNDA_1
C5
LVTX_VDD33_2
HDMI_GNDA_2
+3.3V_LVTX_PLL_DOUGLAS
AF24
C6
LVTX_VDD33_3
HDMI_GNDA_3
C7
HDMI_GNDA_4
AG26
C8
LVTX_PLL_VDD33
HDMI_GNDA_5
Nearby pin AD2 3
R962
C9
0
READY
A26
HDMI_GNDA_6
C10
OTP_VDD3 3
HDMI_GNDA_7
D7
+3.3V_DOUGLA S
B23
HDMI_GNDA_8
D8
C916 5
RPLL_AVDD33
HDMI_GNDA_9
C916 3
C919 6
C914 4
+1.26 V_DDRP LL
0 . 1 uF
10uF
0 . 1 uF
10uF
16V
6.3V
16V
6.3V
C23
AD21
READY
RPLL_AVDD12
LVTX_VSS_1
AD22
+1.26V_DOUGLAS_ D
LVTX_VSS_2
AE20
AE23
USB_ AVDD12
LVTX_VSS_3
AG27
+3.3V_DOUGLA S
LVTX_VSS_4
AF20
USB_AVDD33_ 1
AG19
B22
+1.26V_DOUGLA S
AH19
USB_AVDD33_ 2
RPLL_AGND_ 1
C22
USB_AVDD33_ 3
RPLL_AGND_ 2
AD6
AD20
C919 8
VDAC_VDD12
US B_GND_1
0 . 1 uF
+3.3V_DAC_DOUGLA S
AJ19
16V
C915 2
US B_GND_2
0.1uF
AE6
AF19
AF5
VDAC_ AVDD 33_ 1
US B_GND_3
VDAC_ AVDD 33_ 2
AF6
AC6
VDAC_ AVDD 33_ 3
VDAC_VSS1 2
AD7
VDAC_AVSS33_ 1
VDAC_AVSS33_ 2
AG4
Douglas POWE R
NAND FLASH READ Y
+3.3V_C I
C41 8
C41 7
0.1uF
0.1uF
IC410
HY27US08121B-TPC B
NC_1
NC_2 8
1
48
NC_2
NC_2 7
+3.3V_C I
2
47
NC_3
3
46
NC_2 6
NC_4
NC_2 5
4
45
NC_5
I / O7
HOST_D[7 ]
5
44
NC_6
I / O6
HOST_D[6 ]
6
43
HOST_D[5 ]
R/B
I / O5
HOST_READ Y
7
42
RE
I / O4
HOST_D[4 ]
HOST_O E
8
41
CE
NC_2 4
HOST_CS0_ N
9
40
NC_7
10
39
NC_2 3
NC_8
PRE
11
38
HOST_D[0-7 ]
VCC_1
VCC_2
12
37
VSS_ 1
VSS_ 2
13
36
HOS T_D[0-7]
NC_9
NC_2 2
14
35
NC_1 0
NC_2 1
15
34
CLE
NC_2 0
HOST_A[2 ]
16
33
HOST_D[3 ]
HOST_A[1 ]
ALE
17
32
I / O3
WE
I / O2
HOST_D[2 ]
HOST_W E
18
31
+3.3V_C I
WP
I / O1
HOST_D[1 ]
19
30
NC_1 1
I / O0
HOST_D[0 ]
20
29
NC_1 2
NC_1 9
21
28
C
NC_1 3
NC_1 8
22
27
FLASH_W P
B
Q40 1
NC_1 4
NC_1 7
KRC103 S
23
26
E
NC_1 5
24
25
NC_1 6
+3.3V_C I
C41 5
0.1uF
GND
IC408
CI_DE T
74LCX244MT C
OE 1
VCC
1
20
R47 2
I 0
OE 2
HOST_O E
2
19
47
O4
O0
47
3
18
CI_O E
R47 7
HOST_W E
R47 3
I 1
4
17
I 4
47
O5
COMMON INTERFACE
O1
CI_MIV A L
5
16
47
R47 8
CI_WE
R47 6
R47 4
I 2
I 5
0
HOST_A[6 ]
6
15
47
FE_TS_DA T A_V AL
O6
O2
47
CI_MIS TRT
7
14
CI_IOR D
R47 9
R47 5
I 3
I 6
HOST_A[5 ]
8
13
FE_TS_DA T A_SY N
47
O7
9
12
O3
47
CI_MCLKI
CI_IOWR
R48 0
GND
I 7
10
11
FE_TS_DA T A_CL K
GND
CI_DE T
CI_DE T
IC406
IC407
74LCX244MT C
74LCX244MT C
+3.3V_C I
+3.3V_C I
C41 4
C41 3
0.1uF
0.1uF
OE1
VCC
16 V
OE 1
VCC
16 V
1
20
1
20
I 0
OE 2
I 0
OE 2
2
19
POD_A[8 ]
2
19
O4
O0
O4
O0
3
18
CI_ADDR[0]
RE G
3
18
CI_ADDR[8]
I 1
4
17
I 4
I 1
4
17
I 4
POD_A[7 ]
POD_A[9 ]
HOST_A[4 ]
COMMON INTERFACE
O5
O1
O5
COMMON INTERFACE
O1
5
16
5
16
CI_ADDR[1]
CI_ADDR[14]
CI_ADDR[9]
I 2
I 5
I 2
I 5
6
15
POD_A[6 ]
HOST_A[10 ]
6
15
POD _A[14]
O6
O2
O6
O2
7
14
CI_ADDR[2]
CI_ADDR[13]
7
14
CI_ADDR[10 ]
I 3
I 6
I 3
I 6
8
13
POD_A[5 ]
HOST_A[11 ]
8
13
HOST_A[13 ]
O7
9
12
O3
O7
9
12
O3
CI_ADDR[3]
CI_ADDR[12]
CI_ADDR[11]
GND
I 7
GND
I 7
10
11
10
11
POD_A[4 ]
HOST_A[12 ]
F l a s h & CI
LGE Internal Use Only
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