Fujitsu PRIMEQUEST 2000 Series Design Manual page 31

2.2.1 CPU (2/4)
QuickPath Interconnect (QPI)
n
•A high-speed system bus delivering up to 8.0GT/s (bandwidth 32GB/s)
•The QPI connects a CPU and a chipset or connects CPUs to each other.
CPU Installation Conditions
n
For details, refer to "Appendix G Component Mounting Conditions" in
"Administration Manual".
•CPUs must be installed from CPU#0 on an SB in the order of the slot numbers.
•SBs in which no CPU is installed cannot be incorporated in a PPAR block.
•At least one set of memory modules (two modules) must be installed for a CPU.
Conditions for Installing Different CPUs
n
Different types of CPUs can be installed in different PPAR blocks.
(The CPUs must be supported in the PRIMEQUEST model.)
PRIMEQUEST 2000 Series Design Guide 30 Copyright 2014 FUJITSU LIMITED