Table 3-6. Memc040 Internal Register Memory Map; Table 3-7. Mcecc Internal Register Memory Map - Motorola MVME167 Series User Manual

Table 3-6. MEMC040 Internal Register Memory Map

2nd 1st
MEMC040 MEMC040
$FFF43100 $FFF43000
$FFF43104 $FFF43004
$FFF43108 $FFF43008
$FFF4310C $FFF4300C
$FFF43110 $FFF43010
$FFF43114 $FFF43014
$FFF43118 $FFF43018
$FFF4311C $FFF4301C

Table 3-7. MCECC Internal Register Memory Map

MCECC Base Address = $FFF43000 (1st); $FFF43100 (2nd)
Register Register
Offset Name
$00 CHIP ID
$04 CHIP REVISION
$08 MEMORY CONFIG
$0C DUMMY 0
$10 DUMMY 1
$14 BASE ADDRESS
$18 DRAM CONTROL
$1C BCLK FREQUENCY
MVME167/D3
D31 D30 D29
CID7 CID6 CID5
REV7 REV6 REV5
FSTRD
STS7 STS6 STS5
OUT7 OUT6 OUT5
BAD31 BAD30 BAD29
BAD23 BAD22 DMCTL
BCK7 BCK6 BCK5
D31 D30 D29
CID7 CID5 CID5
REV7 REV6 REV5
0 0 FSTRD 1
0 0 0
0 0 0
BAD31 BAD30 BAD29 BAD28 BAD27
BAD23 BAD22 RWB5
BCK7 BCK6 BCK5
Data Bits
D28 D27 D26
CID4 CID3 CID2
REV4 REV3 REV2
EXTPEN WPB* MSIZ2
STS4 STS3 STS2
OUT4 OUT3 OUT2
BAD28 BAD27 BAD26
SWAIT WWP PARINT
BCK4 BCK3 BCK2
Register Bit Names
D28 D27 D26
CID4 CID3 CID2
REV4 REV3 REV2
0 MSIZ2
0 0 0
0 0 0
BAD26
SWAIT RWB3 NCEIEN NCEBEN
BCK4 BCK3 BCK2
Memory Maps
3
D25 D24
CID1 CID0
REV1 REV0
MSIZ1 MSIZ0
STS1 STS0
OUT1 OUT0
BAD25 BAD24
PAREN RAMEN
BCK1 BCK0
D25 D24
CID1 CID0
REV1 REV0
MSIZ1 MSIZ0
0 0
0 0
BAD25 BAD24
RAMEN
BCK1 BCK0
3-17