Protech Systems PPC-7400 Operation Manual page 117

I/O Address
80h DMA Controller
81h-83h DMA Controller
84h-86h DMA Controller
87h DMA Controller
88h DMA Controller
89h-8Bh DMA Controller
8Ch-8Eh DMA Controller
08Fh DMA Controller
90h-91h DMA Controller
92h Reset Generator
93h-9Fh DMA Controller
A0h-A1h Interrupt Controller
A4h-A5h Interrupt Controller
A8h-A9h Interrupt Controller
ACh-ADh Interrupt Controller
B0h-B1h Interrupt Controller
B2h-B3h Power Management
B4h-B5h Interrupt Controller
B8h-B9h Interrupt Controller
BCh-BDh Interrupt Controller
C0h-D1h DMA Controller
D2h-DDh Reserved
DEh-DFh DMA Controller
F0h See Note 3
170h-177h IDE Controller
1F0h-1F7h IDE Controller
376h IDE Controller
3F6h IDE Controller
4D0h-4D1h Interrupt Controller
CF9h Reset Generator
Notes:
1. Only if IDE Standard I/O space is enabled for Primary Drive. Otherwise, the target is PCI.
2. Only if IDE Standard I/O space is enabled for Secondary Drive. Otherwise, the target is PCI.
3. If POS_DEC_EN bit is enabled, reads from F0h will not be decoded by the ICH2. If
POS_DEC_EN is not enabled, reads from F0h will forward to LPC.
PPC-740X USER S MANUAL
Appendix B Technical Summary
Read Target Write Target
DMA controller &
LPC/PCI
DMA Controller
DMA Controller &
LPC or PCI
DMA Controller
DMA Controller &
LPC or PCI
DMA Controller
DMA Controller &
LPC or PCI
DMA Controller
DMA Controller
Reset Generator
DMA Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Interrupt Controller
Power Management
Interrupt Controller
Interrupt Controller
Interrupt Controller
DMA Controller
DMA Controller
DMA Controller
FERR# /IGNNE#/
Interrupt Controller
1
IDE Controller
2
IDE Controller
1
IDE Controller
2
IDE Controller
Interrupt Controller
Reset Generator
Internal Unit
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
DMA
Processor I/F
DMA
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Power Management
Interrupt
Interrupt
Interrupt
DMA
DMA
DMA
Processor interface
1
Forwarded to IDE
2
Forwarded to IDE
1
Forwarded to IDE
2
Forwarded to IDE
Interrupt
Processor interface
Page: B-7