AOpen MK77M-V User Manual page 70

Socket a amd athlon xp / duron processor based ddr main board
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DRAM Timing
This item allows you to select the value in this field, depending on
whether the board using which kind of DDR DRAM.
The Choice: Manual or By SPD.
SDRAM CAS Latency
This item enables you to select CAS latency time in HCLKs of 2/2 or 3/
3. It's set at factory and depends on the DRAM installed. Don't change
the value unless you change specifications of the CPU or DRAM in-
stalled.
The Choice: 2.5.
Bank Interleave
The interleave number of internal banks, can be set to 2 way, 4 way
interleave or disabled. For VCM and 16Mb type dram chips, the bank
interleave is fixed at 2 way interleave.
When the dram timing is selected by SPD, it will be set by the value on
SPD of the RAM module(SDR).
The Choice: Disabled, 2 Bank, or 4 Bank.
Precharge to Active(Trp)
This item allows you to Precharge Command to Active Command
Period.
The Choice: 3T.
Active to Precharge(Tras)
This item allows you to Active Command to Precharge Command
Period.
The Choice: 6T.
Active to CMD(Trcd)
This item allows you to Active to CMD.
The Choice: 3T .
DRAM Command Rate
This item allows you toselect the DRAM executedrate.
The Choice: 2T Command or 1T Command .
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