Power Supply Circuit; Signaling Circuit; Encode; Decode - Kenwood TK-5210 Service Manual

TK-5210
6-8. FPGA
The FPGA(IC13) I/O section operates at 3.3V. and the core
section operates at 2.5V. The FPGA has the following func-
tion.
• Demodulation (C4FM,CQPSK)
• Shift register(8CH)
• Level convert Buffer amplifier(5V➝3.3V)(9CH)
• Generates 1.536MHz for the demodulation and CODEC.

7. Power Supply Circuit

The battery voltage (+B) is provided from the battery
terminal on the TX-RX unit (X57 A/5).
The battery voltage passes through a 3A fuse (F401) and
goes to the VDD terminal of the DC/DC converter (IC805).
The +B voltage is detected by the voltage detection IC
(IC804). If the voltage is 5.6 V or higher, the IC805 CE pin
becomes high and the DC/DC converter begins.
The IC805 output voltage (3.6V) becomes a power supply
for five regulators (IC801, IC802, IC803, IC806, IC807).
The output from IC805 controls the CE pin of IC801,
IC802, IC803, IC806, IC807 by turning the VOL SW ON/OFF.
The CPU, DSP and FPGA start with the above five
regulators. After the CPU starts, two regulators (IC401,
IC402) begin operating with the PWR and 5CC signals output
from the CPU.
When the Power SW (Q415) is turned ON by the PWR
signal, the 15V DC/DC converter (IC808) is activated. IC807,
IC402, IC401 VDD is provided by +B.
The output from IC401 is switched to 5R that is turned ON
in receive mode and 5T that is turned ON in transmit mode
via CPU control. Output from IC807 includes two voltages:
5M that is always 5 V and 5MCS that is turned ON when an
option is installed on the universal connector.
3A Fuse
3.6V
+B
IC805
DC/DC
CE
IC804
Detect
Batt
S36M
PWR
Q415
SB
Power
SW
PWR
IC5
CPU
PWR
+B
18
CIRCUIT DESCRIPTION
Drive, Final AMP
+B
DC/DC, AVR
CPU, FlashROM,
IC801
33M
EEPROM, VCXO,
AVR IC
CE
VOL
SW IC802
33A
AVR IC
CE
IC803
15D
AVR IC
CE
IC806
FPGA Core
2.5D
AVR IC
CE
IC606
28M
AVR IC
IC808
15V
DC/DC
CE
Q402
IC807
5R SW
AVR IC
CE
CE
5MC
IC402
5C
AVR IC
CE Q402
5CC
5R SW
IC401 CE
AVR IC
5RC
CE
Q401
5T SW
CE
5TC
Fig. 11

8. Signaling Circuit

8-1. Encode (QT/DQT/DTMF/MSK)
Each signaling data signal of QT, DQT, DTMF and MSK is
generated by the DSP circuit, superposed on a modulation
signal and output from pin 16 of the CODEC (IC406).
The modulation balance of the QT/DQT signal is adjusted
by the D/A converter(IC411) and the resulting signal is routed
to the modulation input of the VCO and VCXO (X301).
The each deviation of the TX QT, DQT, DTMF and MSK
tone is adjusted by changing the output level of the CODEC
and the resulting signal is routed to VCO and VCXO. The RX
DTMF tone is output from pin 15 of the CODEC, passes
through the receive audio signal system, and is output from
the speaker.
8-2. Decode (QT/DQT/DTMF/2-tone/MSK)
The audio signal is removed from the FM detection signal
sent to the DSP circuit and the resulting signal is decoded.
9. Compander Circuit
The term "compander" means compressor and expander.
The compander reduces noise by utilizing a compressor and
an expander.
The TK-5210 contains DSP(IC8) to perform this operation.
The TK-5210 compander can be turned on or off using the
FPU.
FPGA (I/O)
DSP (I/O)
DSP Core
RTC
LCD
VCO
5M
5MCS
5R
5T