Supermicro H8DGG-QF User Manual page 60

Revision 1.2
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H8DGG-QF SERVERBOARD USER'S MANUAL
L2 Cache BG Scrub
Allows L2 cache RAM to be corrected when idle. Options are Disabled
and various times in nanoseconds and microseconds.
L3 Cache BG Scrub
Allows L3 cache RAM to be corrected when idle. Options are Disabled
and various times in nanoseconds and microseconds.
 DRAM Timing Confi guration
DRAM Timing Confi g
This setting specifi es the DRAM timing confi guration. Options are Auto and
Manual.
Memory Timing Parameters
This selects the which node's timing parameters to display. Options are CPU
Node 0 or CPU Node 3.
 SouthBridge Confi guration
OHCI/EHCI HC Device Functions
These settings allow you to either Enable or Disable functions for OHCI or EHCI
bus devices.
On Chip SATA Channel
This setting allows you to Enable or Disable the OnChip SATA channel.
On Chip SATA Type
Use this setting to set the On Chip SATA type. Options include
Native IDE, RAID, AHCI and Legacy IDE.
SATA IDE Combined Mode
This setting allows you to Enable or Disable the SATA IDE combined mode.
PATA Channel Confi guration
This allows you to set PATA channel confi guration. Options include SATA as
Primary or SATA as secondary.
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