Circuit Diagram - LG KS360 Service Manual

Lg cell phone service manual
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7. CIRCUIT DIAGRAM

1
2
3
OJ102
A
2V85_VRF3
1V5_VSD1
1V8_VSD2
3
C112
C113
C114
0.1u
B
0.1u
0.1u
R102
LCD_ID
VBAT
0
R103
DNI
H3
BAT_ID
M0
J3
C
RF_TEMP
M1
G4
M2
H4
M7
G3
M8
J4
M9
F4
JACK_TYPE
M10
W3
TXHB
TX2
V3
TXLB
TX1
W2
GSM850_RXP
RX1
V1
GSM850_RXN
RX1X
U1
GSM900_RXP
RX2
T1
GSM900_RXN
RX2X
R3
PABIAS
R4
PA_BAND
PABS
R1
DCS1800_RXP
RX3
T5
D
VDET
U5
PAMODE
P1
DCS1800_RXN
RX3X
N4
VC1
FE1
P5
VC2
FE2
M3
PA_EN
PAEN
N1
PCS1900_RXP
RX4
P3
TX_RAMP
VRAMP
M1
PCS1900_RXN
RX4X
A18
UART_BT_RTS
T_OUT3
J10
UART_BT_CTS
T_OUT4
H11
TOUCH_INT
T_OUT5
E13
PA_MODE
T_OUT6
B19
RPWRON
T_OUT7
K9
E
LIN_PWM_FRQ
T_OUT8
G19
CHG_EN
CLKOUT0
X100
U4
NX3225SA
REFR
4
W7
GND2
HOT2
3
XOX
W8
1
GND1 2
XO
HOT1
26MHz
V10
SIM_DATA
CC_IO
U9
SIM_CLK
CC_CLK
V9
SIM_RST
CC_RST
U10
MMC_CMD
MMCI_CMD
R8
MMC_D0
MMCI_DAT0
R10
MMC_CLK
MMCI_CLK
T9
MMC_D1
MMCI_DAT1
R9
F
MMC_D2
MMCI_DAT2
T10
MMC_D3
MMCI_DAT3
T8
TDO
TDO
2V62_VIO
T7
TDI
TDI
U8
TMS
TMS
V8
TCK
TCK
W9
TRST_N
TRST_N
R6
RTCK
RTCK
R115
10K
N5
TRIG_IN
L5
MON1
R116
0
M5
MON2
VBAT
1V5_VSD1
TP106
R7
FSYS3
TP107
U7
26MHZ_BT
FSYS2
C
A14
VBAT_SD1
A15
VSD1
10uH
A13
SD1_FB
L103
C11
SD2_SD1_SUBST
A12
VSS_SD1
C139
1V8_VSD2
VBAT
A16
SD1_FBL
22u
A11
L104
VBAT_SD2
A10
VSD2
10uH
B9
SD2_FB
B10
SD2_FBL
A9
VSS_SD2
C141
C12
SU_GATE
22u
B14
SU_GND
B11
D
SU_FB
B13
SU_ISENSE
B12
VBAT_SU
C13
VSS_SU
E
UART
UART
3G
2.5G
1
GND
GND
2
RX
RX
UART_RX
3
TX
TX
UART_TX
4
VCHG
VCHAR
NC1
5
ON_SW
ON_SW
RPWRON_EN
6
VBAT
VBAT
VBAT
7
PWR
NC2
VBUS_USB
8
URXD
NC3
USB_DM
9
F
UTXD
NC4
USB_DP
10
DSR
DSR
11
RTS
12
CTS
1
2
3
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
4
5
6
7
1V5_VRF2
2V85_VRF3
2V85_VRF3
2V5_VAUDIO
2V8_VVIB
3V1_VUSB
1V5_VRF2
VBAT
C100
C106
C107
C101
2.2u
2.2u
1u
1u
2V85_VRF3
2V85_VRF3
2V9_VAUX
2V62_VIO
2V85_VRF1
2V85_VRF1
2V9_VMMC
1V5_VPLL
2V85_VRF3
VBAT
2V9_VSIM
VBAT
C127
1u
Domain
Voltage(V)
VAUX
2.9
VIO
2.62
VSIM
2.9/1.8
VMME
2.9/1.8
VUSB
3.1
VLED
2.9
VAUDIOa
2.5
VRF1
2.85
VRF2
1.5
VRF3
2.85
VPLL
1.5
VRTC
2.0
VVIB
2.8
U102
SD1
1.5
PMB8888
SD2
1.8
SU1
5.6 ... 25
2V62_VIO
R120
2.2K
R121
2.2K
4
5
6
7
8
9
10
11
KDR331V
R100
0
VCHG_OVP
2
3
R101
0
VBUS_OVP
1
D100
2V0_VRTC
2V0_VRTC
C117
0.1u
C129
0.1u
DATA(0:15)
R14
TP101
EBU_AD0
W18
EBU_AD1
V18
EBU_AD2
W17
EBU_AD3
T15
EBU_AD4
U14
EBU_AD5
Current(mA)
Net Name
V17
EBU_AD6
T14
EBU_AD7
150
2V9_VAUX
R13
EBU_AD8
W16
EBU_AD9
100
2V62_VIO
V16
EBU_AD10
U12
EBU_AD11
DATA(0:7)
W15
22
2V9_VSIM
EBU_AD12
W14
EBU_AD13
150
2V9_VMMC
V15
EBU_AD14
W13
EBU_AD15
40
3V1_VUSB
N18
EBU_WR_N
_WR
P19
1V8_VSD2
EBU_RD_N
_RD
10
N19
EBU_BC0_N
_BC0
P15
EBU_BC1_N
_BC1
220
2V5_VAUDIO
150
2V85_VRF1
ADD(0:17)
80
1V5_VRF2
H19
EBU_A0
J17
150
2V85_VRF3
EBU_A1
K16
EBU_A2
20
1V5_VPLL
G18
EBU_A3
FCDP
L16
EBU_A4
R111
4
2V0_VRTC
J19
EBU_A5
M_RESET
J16
EBU_A6
1
140
2V8_VVIB
K17
EBU_A7
K18
EBU_A8
L17
400
1V5_VSD1
EBU_A9
K15
EBU_A10
L18
300
1V8_VSD2
EBU_A11
M16
EBU_A12
0 ... 120
J18
EBU_A13
M18
EBU_A14
N15
EBU_A15
L15
EBU_A16
L19
EBU_A17
M15
EBU_A18
M19
EBU_A19
H18
EBU_A20
R16
EBU_A21
N17
EBU_A22
T19
EBU_A23
U17
EBU_A24
R17
1V8_VSD2
EBU_CS0_N
FLASH1_CS
R19
EBU_CS1_N
SDRAM_CS
T17
EBU_CS2_N
P18
EBU_CS3_N
R18
EBU_ADV_N
K19
EBU_RAS_N
_RAS
N16
EBU_CAS_N
_CAS
U18
EBU_WAIT_N
nWAIT
U19
EBU_SDCLKO
SDCLKO
U15
EBU_SDCLKI
SDCLKI
P17
EBU_BFCLKO
U16
EBU_BFCLKI
T18
EBU_CKE
CKE
F18
FCDP_RBN
FCDP
E19
F32K
D19
OSC32K
F19
X101
RESET_N
nRESET
2
1
32.768KHz
B5
C142
IREF1
C145
B6
A_GND
DNI
18p
A6
C144
VREF1
18p
L3
VREF2
L4
IREF2
C147
C146
R117
R118
220n
1u
100K
22K
PO_RESET
M_RESET
PWRON
C148
C149
DNI
DNI
8
9
- 107 -
12
13
14
15
DATA(0:15)
DATA(0)
B3
C7
TP100
ADD(0)
DQ0
A0
DATA(1)
C4
C8
ADD(1)
DQ1
A1
DATA(2)
C3
C9
ADD(2)
DQ2
A2
DATA(3)
D4
B8
ADD(3)
DQ3
A3
DATA(4)
D3
M9
ADD(4)
DQ4
A4
DATA(5)
E4
L9
ADD(5)
DQ5
A5
DATA(6)
E3
K9
ADD(6)
DQ6
A6
DATA(7)
ADD(7)
F4
J9
DQ7
A7
DATA(8)
J4
H7
ADD(8)
1V8_VSD2
DQ8
A8
DATA(9)
K3
H8
ADD(9)
DQ9
A9
DATA(10)
K4
D9
ADD(10)
DQ10
A10
DATA(11)
L3
H9
ADD(11)
DQ11
A11
DATA(12)
L4
G7
ADD(12)
DQ12
A12
DATA(13)
M3
DQ13
DATA(14)
M4
DQ14
DATA(15)
N3
DQ15
B4
VDD1
G9
VDD2
E9
H2
SDRAM_CS
_CS
VDD3
R105 22
M2
SDCLKI
VDD4
R106 22
H4
SDCLKO
CLK
TP102
G8
D2
CKE
CKE
VDDQ1
TP104
F8
F2
_WR
_WED
U100
VDDQ2
D7
K2
ADD(13)
BA0
VDDQ3
D8
ADD(14)
BA1
K5D1G12ACD-D075
E7
_RAS
_RAS
F7
C2
_CAS
_CAS
VSS1
G3
F9
_BC0
LDQM
VSS2
C131
C132
C133
H3
G2
_BC1
UDQM
VSS3
0.1u
0.1u
0.1u
N4
VSS4
DATA(0)
J5
E2
IO0
VSSQ1
DATA(1)
L5
J2
IO1
VSSQ2
DATA(2)
J6
L2
IO2
VSSQ3
DATA(3)
L6
IO3
DATA(4)
J7
IO4
DATA(5)
L7
IO5
DATA(6)
J8
B6
IO6
VCC1
DATA(7)
L8
N7
IO7
VCC2
N6
VCCQ
C6
FLASH1_CS
_CE
D5
ADD(16)
ALE
C136
C137
C138
C5
ADD(17)
CLE
0.1u
0.1u
0.1u
TP105
E5
B5
_RD
_RE
VSS5
E6
N5
R__B
VSS6
D6
N8
_WR
_WE
VSS7
F5
_WP
EXT_RESET
2V0_VRTC
2V62_VIO
U101
TC7SH08FS
5
1
_EXTRST
VCC
4
nRESET
3
PO_RESET
GND
2
ON BOARD ARM9 JTAG & ETM INTERFACE
1V8_VSD2
CN100
G1
G2
1
30
2
29
3
28
4
27
TRST_N
5
26
TDI
6
25
TMS
7
24
TCK
8
23
RTCK
9
22
TDO
10
21
_EXTRST
11
20
12
19
13
18
14
17
15
16
G3
G4
LGE Internal Use Only
16
A
ADD(0:12)
B
1V8_VSD2
C
C134
C135
0.1u
0.1u
1V8_VSD2
D
E
F
C
D
E

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