Samsung SPH-A900 Service Manual page 10

Circuit Description
Frequency Synthesizer Circuit
The PLL(Phased Locked Loop) block consists of VC-TCXO(TCK301), PLL in S1M8690X and
VCO(VCO300). Input reference frequency is generated at VC-TCXO(TCK301) and the RF local signal is
generated at VCO. PLL compares the two signals and generates the desired signal with a
preprogrammed counter which controls voltage.
VOLTAGE CONTROLLED TEMPERATURE COMPENSATED CRYSTAL OSCILLATOR (TCK301)
The VC-TCXO (TCK301) is a reference source of the frequency synthesizer. It provides 19.2MHz
reference frequency to PLL-IC. It is a voltage controlled temperature compensated crystal
oscillator having 19.2MHz ±2.5ppm frequency stability over all useful temperature range.
A correct frequency tuning is made by the control voltage.
2-2-2. Transmitter
Intenna
Intenna sends signal to the base station and receives the signal from the base station.
It is a tri-band Intenna and covers PCS band, CDMA band and GPS band.
RF Switch
It(U401:TQP4M3018) is used to switch the PCS path and CDMA path and the GPS
path. The RF signal passes through PCS path when PCS_MODE is high(2.6V). The RF signal
passes through CDMA path when CELL_MODE is high(2.6V). The RF signal passes through
GPS path when GPS_MODE is high(2.6V). PCS_MODE, CELL_MODE and GPS_MODE are
digital signals from MSM6500 GPIO.
Duplexer
Duplexer(DUF400) allows to transmit only the signals within acceptable Tx frequency range
(1880 ± 30 MHz) through the Intenna.
It provides the appropriate attenuation of transmitted signal at the receiver input and the appropriate
rejection of the transmit-generated noise in the Receiver band.
Power Amp
Power amplifier module(PAM400:WS1413) amplifiers signal to be sent to the base station
through the antenna.
2-6
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