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Lcd Module - Samsung STH-N375 Service Manual

Tdma mobile telephone

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ARM Address Range
0000 0000
0000 0003
0000 0004
0000 1FFF
0002 0000
0002 0FFF
0004 0000
0005 FFFF
0080 0000
00FF FFFF
0100 0000
017F FFFF
0180 0000
01FF FFFF
0200 0000
027F FFFF
HOST CPU (inside of BEC:U203)
ARM7TDM1 32-bit microprocessor is used for the main call processing. The CPU controls all the circuitry.
The reference clock 14.4 MHz, coming from the output of the TCXO (OSC302), is connected to
VCTCXO_IN (pin F3). For the sleep mode, additional crystal oscillator (Y201) of 32.768kHz is connected to
pin B2 of the BEC. The interface circuitry consists of reset circuit, address bus (A0-A21), data bus (AD0-
AD15), control signals (MEMWEB, MEMOEB, SRAM_CS, FLASH CS, DISPLAY_CS, UBE etc), GPIOs, and
the communication ports. The communication ports includes UARTI, UART2, JTAG, and SCI. The UARTI
supports HP equipment interface, down loading, and data service. The UART2 and the JTAG are used for
the software debugging. The SCI ports support the diagnostic monitor (DM) function.
FLASH ROM (inside of U202)
The 16Mbits FLASH ROM is used to store code of the application program. Using the down-loader
program, this application program can be changed even after the mobile is fully assembled.
SRAM (inside of U202)
The 4Mbits SRAM is used to store the internal flag information, call processing data, and timer data.
Key-Matrix
The Key-Matrix is consisted of 8 x 3 matrix, which use GPIO input signal SCAN0-7 and GPIO output
signal KEY0-2 of BEC.

LCD MODULE

LCD module is connected to main board directly. This contains 4-LEDs they are used as backlight. The
LCD controllers control the information of displaying from the BEC (parallel 8-bit data) to the LCD.
BASEBAND ENGIN (inside of U203)
This part mainly interfaces with IFC (U101) and RF part. As for interface of IFC, that will be explained
detail in next section. As important signals are PREAMP_G for receiver path, PAGATE, ALC_EN for
transmitter path, PLL DATA, PLL CLK, PLL STRBl for PLL synthesizer, RX BAT, TX BAT for power
management.
Table1. ARM Memory Map
ARM Memory Map
Data
Block Size Bytes
32
4 Byte
32
8K Byte
32
4K Byte
32/16
NA
8/16
Up to 8 M Byte
8/16
Up to 8 M Byte
8/16
Up to 8 M Byte
8/16
Up to 8 M Byte
SAMSUNG Proprietary-Contents may change without notice
STH-N375
Circuit Description & Circuit Diagrams
D5206_LIB Name
Internal ROM
Internal RAM
Internal ROM
Internal Peripherals
FLASH_CS
SRAM_CS
CS_RES1
CS_RES2
6-3
APP_PIN Name
Remarks
-
R
-
R/W
-
R
-
R/W
FLASH_CS
R/W
R/W
SRAM_CS
R/W
DISPLAY_CS
R/W

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