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6. STH-N375 Circuit Description & Circuit Diagrams
STH-N375/N371 provides the AMPS and the Digital TDMA (cellular band only) of compliance with
TIA/EIA/IS-136. The radio operation of the STH-N375N371 has been implemented with the receiver, the
transmitter, and the local oscillator controlled by the PLL. The circuit of the STH-N375/N371 is described as
followings.
1. Baseband Section
1-1. Power Supply
For the POWER ON, with the battery installed on the telephone and by pressing the END key, the BATT
and ON_SW signals will be connected, which it will turn on Q107. In addition, Q106 is turned on by Q107,
and thus the BATT is connected to VBAT. Consequently, VBAT is supplied to input of regulators U107,
U110 and U111. The regulator U110 supplies all powers of baseband part (VCC, AVCC, V_VCTCXO). The
regulator U111 supplies IVCC (2.2 V) to Baseband Engine Chip (U203: BEC). The regulator U107 supplies
VAUX (3.3V output power) to LED for back-light of U312. After the BEC (U203) is supplied power from
VCC, IVCC. The BEC use 14.4MHz as reference clock, 14.4MHz comes out from TCXO (OSC302). If the
powers (VCC,AVCC, V_VCTCXO) and reference clock are normal, the main application program will start
to run. In addition, the BEC starts to run and outputs OWER_HOLD signal (low active), which is
connected to Q105. Moreover, Q105, Q106 and Q107 are turned on in order. In consequence, BATT is
connected to VBAT continuously although END key is released (ON_SW disconnected BATT). The powers
from U110 and U111 are used in all baseband part of BEC, IFC (Interface Chip U101).
For the POWER OFF, in this case main application program is running already. The main application
program check all GPIO inputs periodically. The END key is pressed during program run, the BATT and
ON_SW signals will be connected. This turns on Q108. Therefore, ON_SW_SENSE that is connected to
GPIO_0_5 (U203_ C13) turned logic high to low. The BEC checks this signal, main application program
enter to POWER OFF mode.
1-2. BEC (U203) interface
BEC (U203) mainly consist of two parts HOST CPU and Baseband Engine (Figure2~1). This is the most
important component of dual-mode (US-TDMA and AMPS mode) cellular telephone. It has IKx32bits of
internal ROM and 2Kx32bits of internal RAM. This chip communicates with a lot of peripheral device,
memory (SRAM, ROM), Key-Matrix and display module. The BEC receives TCXO clock signals (reference
clock) from the TCXO and controls the telephone during the operation. The BEC communicates with the
IFC through several serial links. These include CODEC, wideband data, receiver data, transmitter data,
and auxiliary data interface. A master baseband clock (BBCLK: U203_H2) at either 6.2208 MHz or 5.12
MHz or 4.096 MHz, depending on the operating mode, from the BEC drives the IFC. The major
components are as follows:
Separate address and data buses provide a data path to external memory and memory-mapped
peripherals. The 22-bit address bus provides a byte addressing range up to 8 MB in each of 4 spaces
decoded by the 4 select signals. The 16-bit data bus in conjunction with the UBE signal allows word or byte
transfers. Table2-1 shows the ARM memory map. An Intel 28F3204 Stacked Memory chip supplies 4M
Bytes of Flash memory and 512K Bytes of SRAM. Note that in the telephone, the SRAM is located at the
CS_RES1 block of memory.
SAMSUNG Proprietary-Contents may change without notice
6-1
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