Circuit Description - Vertex Standard VX-2200 Series Service Manual

1. Circuit Configuration by Frequency
The receiver is a double-conversion superheterodyne with
a first intermediate frequency (IF) of 67.65 MHz and a
second IF of 450kHz. The incoming signal from the an-
tenna is mixed with the local signal from the VCO/PLL to
produce the first IF of 50.85MHz. This is then mixed with
the 67.2 MHz second local oscillator output to produce
the 450 kHz second IF. This is detected to give the de-
modulated signal.The transmit signal frequencyis gener-
ated by the PLL VCO and modulated by the signal from
the microphone. It is then amplified and sent to the an-
tenna.
2. Receiver System
2-1. Front-end RF amplifier
The incoming RF signal from the antenna is delivered to
the RF Unit and passes through the Low-pass filter which
removes undesired frequencies by use of varactor diodes,
tuned band-pass filter consisting of diodes D1003, D1004,
D1005, & D1006 (all 1SV323), coils L1006 & L1009, and
capacitors C1013, C1016, C1033, C1039, C1041, & C1044.
The passed signal is amplified in Q1007 (2SC3356) and
moreover cuts an image frequency with the band pass
filter consisting of coils L1011, L1013, L1014, & L1015,
capacitors C1003, C1011, C1012, C1016, C1022, C1023,
C1027, C1028, C1334, & C1141 and comes into the 1st
mixer.
2-2. First Mixer
The 1st mixer consists of the Q1025 (3SK293). Buffered
outputfrom the VCO is amplified by Q1023 (2SC5226)
to provide a purefirst local signal between 201.65 and
241.65 MHz for injection to the first mixer. The output IF
signal is entersfrom the mixer to the crystal filter. The IF
signal then passesthrough monolithic crystal filters
XF1001 (±5.5 kHz BW) to strip away all but the desired
signal.
2-3. IF Amplifier
The first IF signal is amplified by Q1033 (2SC5226). The
amplifiedfirst IF signal is applied to FM IF subsystem IC
Q1036 (NJM2591) which contains the second mixer sec-
ond local oscillator limiter amplifier noise amplifier and
S-meter amplifier. The signal from the refernce oscillator
is tripled by Q1033 (2SC5226), it is mixed with the IF
signal and becomes 450 kHz. The second IF then passes
through the ceramic filter CF1001 (for wide channels)
CF1002 (for narrow channels) to strip away unwanted
mixer products which removes amplitude variations in
the 450 kHz IF before detection of the speech by the
ceramicdiscriminator CD1001.

Circuit Description

2-4. Audio amplifier
Detected signal from Q1036 (NJM2591V) is inputted to
Q1042 (LM2902PW) and is output through the band pass
filter inside Q1042 (LM2902PW). When the optional unit
is installed Q1044 (SN74LV4066APW) is turned "OFF"
and the AF signal from Q1042 (LM2902PW) goes the op-
tional unit. When the optional unit is not installed, Q1042
(LM2902PW) is turned "ON" and the signal goes through
Q1004 (SN74LV4053APM). The signal then goes through
AF mute switch Q1044 (SN74LV4066APW) de-emphasis
part Q1042 (LM2902PW). amplified with AF power am-
plifier Q1003 (TDA1519CTH) after passing AF volume
Q1014 (M62364FP). The output of Q1003 (TDA1519CTH)
drives a speaker (either the internal or external speaker).
2-5. Squelch Circuit
There are 13 levels of squelch setting from 0 to 12. The
level 0 means open the squelch. The level 1 means the
threshold setting level and level 11 means tight squelch.
From 2 to 10 is established in the middle of threshold and
tight. The bigger figure is nearer the tight setting. The level
12 becomes setting of carrier squelch.
2-5-1. Noise Squelch
The noise squelch circuit is composed of the band pass
filter of Q1036 (NJM2591V) noise amplifier Q1047
(LM2902PW) and noise detector D1047 and D1048 (both
MC2850). When a carrier isn't received, the noise ingre-
dient which goes out of the demodulator Q1036
(NJM2591V) is amplified in Q1047 (LM2902PW) through
the band pass filter Q1036 (NJM2951V) is detected to DC
voltage with D1047, D1048 (both MC2850) and is input-
ted to 15 pin (the A/D port) of the Q1065 (CPU:
LC87F5CC8A). When a carrier is received the DC volt-
age becomes "LOW" because the noise is compressed.
When the detected voltage to CPU is "HIGH," the CPU
stops AF output with Q1044 (SN74LV4053) "OFF" by
making pin 80 low. When the detection voltage is low the
CPU makes Q1068 "ON" making pin 80 "H" enabling
AF output.
2-5-2. Carrier Squelch
The Pin 14 (A/D port) of Q1065 (CPU: LC87F5CC8A) de-
tects RSSI voltage output from pin 12 of Q1036
(NJM2591V), and controls AF output. The RSSI output
voltage changes according to the signal strength of car-
rier. The stronger signal makes the RSSI voltage higher.
The process of the AF signal control is the same as Noise
Squelch. The shipping data is adjusted 3dB higher than
squelch tight sensitivity.
E-1