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M
K
7
7
M
/
M
K
7
7
M
K
7
7
M
/
M
K
7
7
A
T
A
/
1
0
0
A
T
A
/
1
0
0
ATA/100 is a new IDE specification under developing. ATA/100 uses both rising edge and falling edge as
time is reduced to 40ns. The data transfer rate is (1/40ns) x 2 bytes x 2 = 100MB/s. To use ATA/100, you need special 80-wire
IDE cable, the same as ATA/66.
A
T
A
/
1
3
3
A
T
A
/
1
3
3
ATA/133 is a new IDE specification under developing. ATA/133 uses both rising edge and falling edge as
time is reduced to 30ns. The data transfer rate is (1/30ns) x 2 bytes x 2 = 133MB/s. To use ATA/133, you need special 80-wire
IDE cable, the same as ATA/66.
B
I
O
S
(
B
a
s
i
c
I
n
p
u
t
/
B
I
O
S
(
B
a
s
i
c
I
n
p
u
t
/
BIOS is a set of assembly routine/program that reside in
hardware devices of motherboard. In general, to provide hardware independent portability, operation system and drivers is
required to access BIOS without directly access hardware devices.
B
u
s
M
a
s
t
e
r
I
D
E
(
D
B
u
s
M
a
s
t
e
r
I
D
E
(
D
The traditional PIO (Programmable I/O) IDE requires the CPU to involve in all the activities of the IDE access including waiting
for the mechanical events. To reduce the workload of the CPU, the bus master IDE device transfers data from/to memory
without interrupting CPU, and releases CPU to operate concurrently while data is transferring between memory and IDE device.
You need the bus master IDE driver and the bus master IDE HDD to support bus master IDE mode.
M
I
I
M
I
I
O
u
t
p
u
t
S
y
s
t
e
m
)
O
u
t
p
u
t
S
y
s
t
e
m
)
M
A
m
o
d
e
)
M
A
m
o
d
e
)
EPROM
or
Flash
ROM. BIOS controls Input/output devices and other
76
O
n
l
i
n
e
M
a
n
u
a
l
O
n
l
i
n
e
M
a
n
u
a
l
ATA/66
but clock cycle
ATA/66
but clock cycle
- Quick Links:
- Overview
- Motherboard Map
- Front Panel Connector
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