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A
X
4
T
-
5
3
3
P
r
o
A
X
4
T
-
5
3
3
P
r
o
2
2
S
h
a
d
o
w
E
P
R
O
M
S
h
a
d
o
w
E
P
R
O
M
A memory space in Flash-ROM to simulate E
battery-less design
S
I
M
M
(
S
i
n
g
l
e
I
n
L
i
S
I
M
M
(
S
i
n
g
l
e
I
n
L
SIMM socket is only 72-pin, and is only single side. The golden finger signals on each side of PCB are identical. That is why it
was called Single In Line. SIMM is made by FPM or
current motherboard design.
S
M
B
u
s
(
S
y
s
t
e
m
M
S
M
B
u
s
(
S
y
s
t
e
m
M
SMBus is also called I2C bus. It is a two-wire bus developed for component communication (especially for semiconductor IC).
For example, set clock of clock generator for jumper-less motherboard. The data transfer rate of SMBus is only 100Kbit/s, it
allows one host to communicate with CPU and many masters and slaves to send/receive message.
S
P
D
(
S
e
r
i
a
l
P
r
e
s
e
S
P
D
(
S
e
r
i
a
l
P
r
e
s
e
SPD is a small ROM or
EEPROM
timing and chip parameters. SPD can be used by
2
PROM operation, AOpen motherboard uses Shadow E
n
e
M
e
m
o
r
y
M
o
d
u
i
n
e
M
e
m
o
r
y
M
o
d
u
a
n
a
g
e
m
e
n
t
B
u
s
)
a
n
a
g
e
m
e
n
t
B
u
s
)
n
c
e
D
e
t
e
c
t
)
n
c
e
D
e
t
e
c
t
)
device resided on the
BIOS
l
e
)
l
e
)
EDO
DRAM and supports 32-bit data. SIMM had been phased out on
DIMM
or RIMM. SPD stores memory module information such as DRAM
to decide best timing for this DIMM or RIMM.
101
O
n
l
i
n
e
M
a
n
u
a
l
O
n
l
i
n
e
M
a
n
u
a
l
2
PROM for jumper-less and
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