Table of Contents
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P
(continued)
Ports (continued)
peripheral interrupt request (PIR) line
reset (RES) line
43
,
specifying
14
,
specifying multiple
,
status (STS) line
43
,
transfer control register
transfer mode
116
,
type combinations allowed
writing data to
83
,
–
31
Primary Address
,
Program Examples
combine all 4 ports
,
input data bits and bytes
output data bits and bytes
reading
an 8-bit byte
128
,
registers
123
124
,
–
register access
121
,
resetting the module
set the handshake mode
system configuration
trace memory
38
39
,
–
using
non-data I/O lines
PIR interrupt lines
verify initial operation
writing
a 16-bit word
127
,
an 8-bit byte
125
,
Programming
debugging register-based
the Digital I/O module
using SCPI
13
15
,
–
Pull-up
calculating resistor value
discrete resistive
29
,
enable jumpers
19
,
external
28
29
,
–
internal
19
29
,
,
resistor
19
28
,
,
PULSe Handshake Mode
87
89
117
–
,
43
,
15
37
53
,
,
113
,
55
,
84
37
35
,
36
,
129
–
122
,
34
,
121
,
136
,
132
,
16
,
126
–
130
,
13
15
,
–
28
,
34
44
47
78
80
81
,
,
,
,
,
–
Q
Query
data
bits
77
,
blocks available
lines polarity
error register
external memory state
flag line
polarity
status
,
handshake
delay time
mode
,
I/O control line
memory block size
module description
monitor mode state
operation
event status register
status condition register
questionable status
condition register
event register
register
SCPI version
VME memory
address
size
70
,
Questionable Status
condition register
enable register
event register
93
register
,
query mask set
R
Range Multipliers
98
*RCL
,
Reading
a 16-bit word
an 8-bit byte
,
data from memory block
operation
event status register
status condition register
questionable status
condition register
event register
registers
123
,
90
,
82
,
97
,
71
,
86
,
67
79
88
,
,
81
89
,
89
,
92
,
96
,
63
,
94
,
94
,
95
,
95
,
95
,
97
,
69
,
95
,
94
,
95
,
95
,
117
,
130
,
128
129
,
–
91
,
94
,
94
,
95
,
95
,
124
–
Index
151
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