Other Bus Devices; Fpga Block Diagram - Fluke 2680A Service Manual

268XA
Service Manual
URT URT URT

Other Bus Devices

The microprocessor's external bus controller, in addition to the fpga, communicates with
onboard SDRAM, onboard flash ROM and PCMCIA flash memory cards. These
additional device interfaces are contained on page 4 of the 1004 schematic. There are 32
MB of onboard SDRAM, configured as 4-8 MB by 8 bit wide devices (U18, 19, 21 and
22). The timing of the row and column address strobes (RAS*, CAS*), chip select
(CS1*), write enable (RAMWE*), and byte mask signals (BSA0*-3*) is controlled by a
state machine in the microprocessor's SIU. The relative states of these signals determine
what mode the SDRAM operates in, 4 word burst, single word access, refresh, etc. There
are 4 MB of onboard flash ROM, configured as a single 2 MB by 16 bit wide device
(U20). U20 is an Intel Strataflash E28F320J3A.
2-8
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Guard xing
Address Decode
Data Mux
Figure 2-4. FPGA Block Diagram
Clock
Generator
key_ck
Trigger In/Out
Entity
Keypad
alg109f.eps