Figure 5. I/O Pins And Supported Ata Signals - Seagate Medalist 4340 Product Manual

22 Medalist 4340, 3230, 2120, 1721 and 1010, Rev. A
Drive pin #
Signal name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pins 28, 34 and 39 are used for master-slave communication (details shown below).
Drive 1 (slave) Drive 0 (master)
28
34
39

Figure 5. I/O pins and supported ATA signals

Host pin # and signal description
Reset –
1
Ground 2
DD7 3
DD8 4
DD6 5
DD9 6
DD5 7
DD10 8
DD4 9
DD11 10
DD3 11
DD12 12
DD2 13
DD13 14
DD1 15
DD14 16
DD0 17
DD15 18
Ground 19
(removed)
20
DMARQ 21
Ground 22
DIOW –
23
Ground 24
DIOR –
25
Ground 26
IORDY 27
CSEL 28
DMACK –
29
Ground 30
INTRQ 31
IOCS16 –
32
DA1 33
PDIAG –
34
DA0 35
DA2 36
CS1FX –
37
CS3FX –
38
DASP –
39
Ground 40
28 CSEL
PDIAG –
34
DASP–
39
Host Reset
Ground
Host Data Bus Bit 7
Host Data Bus Bit 8
Host Data Bus Bit 6
Host Data Bus Bit 9
Host Data Bus Bit 5
Host Data Bus Bit 10
Host Data Bus Bit 4
Host Data Bus Bit 11
Host Data Bus Bit 3
Host Data Bus Bit 12
Host Data Bus Bit 2
Host Data Bus Bit 13
Host Data Bus Bit 1
Host Data Bus Bit 14
Host Data Bus Bit 0
Host Data Bus Bit 15
Ground
(No Pin)
DMA Request
Ground
Host I/O Write
Ground
Host I/O Read
Ground
I/O Channel Ready
Cable Select pin
DMA Acknowledge
Ground
Host Interrupt Request
Host 16 Bit I/O
Host Address Bus Bit 1
Passed Diagnostics
Host Address Bus Bit 0
Host Address Bus Bit 2
Host Chip Select 0
Host Chip Select 1
Drive Active / Slave Present
Ground
Host
28
34
39