Splitting The Encode And Decode Cells; Adding The Control Tsk And Mbx Communication; Figure 2. Detailed Application Data Flow Showing Memory Buffers - Texas Instruments DSP/BIOS Real-Time Analysis (RTA User Manual

SPRAA56
YAfter420
Device
D river
Buffer
Y uv
4 22to
3 fram es
420 C bAfter420
scratch1
14 KB = 20 lines
K e y K e y
DMA Read/W rite (background) DMA Read/W rite (background)
CPU Read/W rite CPU Read/W rite
Figure 2.
Note: The dotted lines in Figure 2 indicate EDMA moves, and the solid lines indicate CPU
reads/writes. The application performs only CPU reads/writes from mapped internal memory,
relying on the EDMA to copy working data into internal scratch buffers.
3.1

Splitting the Encode and Decode CELLs

In the base example, the H.263 encoder and decoder are wrapped in sequential CELLs in a
single channel. This is suitable for an example application, but in actual video systems the input
to the decoder would be an encoded bitstream from an external source, and the output from the
encoder would be sent to an external source such as a network stream or a hard disk drive.
Splitting the encoder and decoder into separate channels better supports external sourcing or
transport of the encoded bitstream. Additionally, splitting the encoder and decoder allows them
to be benchmarked separately for execution time.
A separate CHAN was created and initialized for the H.263 encoder and the H.263 decoder. At
run-time, a separate CHAN_execute command can be executed for each channel.
3.2

Adding the Control TSK and MBX Communication

The second change to the base example was the addition of a control TSK to send control
commands to the process TSK using the MBX module from DSP/BIOS. A MBX object,
mbxProcess, was added in the DSP/BIOS text-based configuration file appThread.tci. That MBX
object transmits control commands to the tskVideoProcess TSK to change run-time parameters
such as the video frame rate and the encoder bitrate.
8
DSP/BIOS Real-Time Analysis (RTA) and Debugging Applied to a Video Application
720x576
414 KB
H .263
en c
C rAfter420
207 KB
6 KB
Instance
m em ory
Internal Mem ory Internal Mem ory
External Mem ory External Mem ory
DSP C PU Function DSP C PU Function
Detailed Application Data Flow Showing Memory Buffers
bitBuf
512 KB
H .263
d ec
Shared
Scratch
92 KB
1.5 KB
Instance
m em ory
y
414 KB
Y uv
422to
C r
C bArrau 420
C b
207 KB
scratch2
14 KB
Device Device
Driver Driver
Buffer Buffer
3 fram es 3 fram es