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BLOCK DIAGRAM
8
10
OUTC1
<Current Amp1>
13
12
9
INE1
7
FB1
4
2
OUTC2
<Current Amp2>
24
1
3
INE2
FB2
5
16
INE3
11
OUTD
FB3
15
CS
22
<Error Amp1>
VREF
20
<Error Amp2>
VREF
20
<Error Amp3>
VREF
4.2 V
<SOFT>
VREF
10
A
45 pF
<PWM Comp.>
<OUT>
Drive
VCC
Bias
Voltage
(V
CC
<VH>
2.5 V
1.5 V
<UVLO>
(VCC UVLO)
215 k
35 k
0.91 V
(0.77 V)
VREF
UVLO
VCC
4.2 V
<OSC>
<REF>
<CTL>
VREF
5.0 V
bias
17
6
23
RT
GND
VREF
MB3887
21
VCC (O)
20
OUT
19
VH
6 V)
VCC
18
VCC
CTL
14
5
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