Advanced Chipset Settings
Configure DRAM Timing by SPD
DRAM ECC Mode
Hyper Path 3
DRAM Throttling Threshold
Booting Graphic Adapter Priori
Universal PCI-E Speed
PEG Buffer Length
Link Latency
PEG Root Control
PEG Link Mode
Slot Power
High Priority Port Select
4-28
[Enabled]
[Auto]
[Auto]
[Auto]
[PCI Express/PCI]
[x2 Mode(fast)]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[Disabled]