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TYAN S8228 Notice page 75

Amd opteron sr5650 & sp5100 chipset
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GPP1 Core:
Feature
GPP1 Core
Turn Off PLL During L1/L23
TXCLK Clock Gating in L1
LCLK Clock Gating in L1
Option
Disabled
Enable
Disabled
Enable
Disabled
Enable
75
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