Table of Contents

Advertisement

3.7.1 Chipset
South Bridge Chipset Configuration
SMBUS Controller
SLP_S4# Min. Assertion Width
Restore on AC Power Loss
Watchdog Mode
Watchdog Mode
Post: BIOS post Watchdog, timer counting start at PowerOn, Stop at OS boot
OS: OS boot Watchdog, Start at OS boot
PowerOn: Start at PowerOn.

3.8 Exit

Exit Options
Save Changes and Exit
Discard Changes and Exit
Discard Changes
Load Optimal Defaults
Load Failsafe Defaults
Save Changes and Exit
Exit system setup after saving the changes
F10key can be used for this operation.
Discard Changes and Exit
Exit system setup without saving any changes
ESC key can be used for this operation.
Discard Changes
Discards all changes made without exiting BIOS setup.
F7 key can be used for this operation.
Chipset
Options
Enabled
[Enabled]
Disabled.
[1 to 2 seconds]
[Power On]
[Disabled]
↑↓
+-
F1
F10
Esc
Exit system setup after
saving the changes.
F10 key ca be used for this
operation.
↑↓
+-
F1
F10
Esc
41
http://www.TYAN.com
Select Screen
Select Item
Change Option
General Help
Save and Exit
Exit
Exit
Select Screen
Select Item
Change Option
General Help
Save and Exit
Exit

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents