Acer Extensa 61X Service Manual page 110

Table 2-10 C&T 65550 Pin Descriptions (continued)
Pin# Pin Name
Flat Panel Display Interface (continued)
55 RSET
59 AVCC
56 AGND
203 XTALI (MCLK)
204 (Reserved)
205 CVCC0
202 CGND0
206 CVCCI
208 CGNDI
154 32KHz (GP102) (AA9)
Power / Ground and Standby Control
178 STNDBY#
80 IVCC
77 IGND
181 IVCC
184 IGND
9 BVCC
12 BGND
26 BGND
42 BVCC
39 BGND
52 BGND
Major Chips Description
Type
In Set point resistor for the internal color palette DAC. A 560
1% resistor is required between RSET and AGND.
VCC Analog power and ground pins for noise isolation for the
GND internal color palette DAC. AVCC should be isolated from
digital VCC as described in the Functional Description of the
internal color palette DAC. For proper DAC operation, AVCC
should not be greater than IVCC. AGND should be common
with digital ground but must be tightly decoupled to AVCC.
See the Functional Description of the internal color palette
DAC for further information .
In Crystal In. This pin .serves as the input for an external
reference oscillator (usually 14.31818 MHz). Note that in test
mode for the internal clock synthesizer, MCLK is output on
A25 (pin 30) and VCLK is output on A24 (pin
Reserved. For compatibility with the 65545, this pin (formerly
"Crystal Out" or "XTLAO") must be disconnected. In addition,
pin 150 must be pulled down on reset. The 65545 no longer
supports the "internal oscillator option.
VCC Analog power and ground pins for noise isolation for the
GND internal clock synthesizer. Must be the same as VCC for
VCC internal logic. VCC/GND pair 0 and VCC/GND pair 1 pins
GND must be carefully decoupled individually.
Note that the CVCC voltage must be the same as the voltage
for the internal logic (IVCC).
In Clock input for refresh of non-self-refresh DRAMs and panel
power sequencing. This pin can be programmed as GP102
instead of 32KHz input, or AA9 for 512Kx3 memory
configurations.
IN Standby Control Pin. Pull this pin to place the chip in
Standby Mode.
VCC Power / Ground (Internal Logic). 5V 10% or 3.3V 0.3V.
GND
Note that this voltage must be the same as CVCC (voltage for
VCC
internal clock synthesizer). This voltage must also be equal
GND
to, or greater than AVCC (voltage for DAC).
VCC Power / Ground (Bus Interface) 5V 10% or 3.3V 0.3V.
GND
GND
VCC
GND
GND
Description
2-53