Tables
eDP/PEG Ball Mapping .............................................................................32
System States........................................................................................36
PCIe Link States .....................................................................................37
DMI States ............................................................................................37
Specifications .........................................................................................53
Specifications .........................................................................................54
Memory Channel A..................................................................................69
Memory Channel B..................................................................................70
PLL Signals ............................................................................................75
TAP Signals............................................................................................76
Power Sequencing ..................................................................................78
Ground and NCTF ...................................................................................81
Signal Groups1.......................................................................................88
6
Datasheet