TYAN TRINITY 400 Manual page 55

PNP OS Installed
Select Yes if the system operating environment is Plug-and-Play aware (e.g.,
Windows 98, Windows 2000).
Resources Controlled By
The Plug and Play EliteBIOS can automatically configure all the boot and Plug
and Play-compatible devices. If you select Auto, all the interrupt request (IRQ)
and DMA assignment fields disappear, because the BIOS automatically
assigns them.
Reset Configuration Data
Normally, you leave this field Disabled. Select Enabled to reset Extended
System Configuration Data (ESCD) when you exit Setup if you have installed a
new add-on and the system reconfiguration has caused such a serious conflict
that the operating system cannot boot.
CPU to PCI Write Buffer
When this field is Enabled, writes from the CPU to the PCI bus are buffered, to
compensate for the speed differences between the CPU and the PCI bus.
When Disabled, the writes are not buffered and the CPU must wait until the
write is complete before starting another write cycle.
PCI Dynamic Bursting
When Enabled, every write transaction goes to the write buffer. Burstable
transactions then burst on the PCI bus; nonburstable transactions do not.
PCI Master 0 WS Write
When this field is Enabled, writes to the PCI bus are executed with zero wait
states.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay
transaction cycles. Select Enabled to support compliance with PCI specifica-
tion version 2.1.
PCI#2 Access #1 Retry
Select Enabled to rotate priority of PCI masters.
AGP Master 1 WS Write
Select Enabled to add one clock tick to AGP write operations.
S1854 Trinity 400
55