TYAN M4881 Manual page 20

Here are a few key points to note before installing memory into your QUAD CPU
Cards:
• Always install memory beginning with CPU4_DIMM0 or CPU4_DIMM2
• In order to access memory that is associated with each CPU socket you
must also have a CPU installed in that corresponding socket.
installed into dimm sockets that do not have a CPU installed with it will be
non-functional.
• AMD Opteron
(interleaved) memory configurations
• At least ONE Registered DDR SDRAM module must be installed for the
system to turn on and POST (power on self test)
• 128MB, 256MB, 512MB, 1GB, 2GB and 4GB Registered PC1600 /PC2100 /
PC2700 / PC3200 DDR SDRAM memory modules are supported
• All installed memory will be automatically detected
The QUAD CPU CardsPro supports up to 32GB / 64GB.*
The eight-way system (S4881+M4881) supports up to 64GB /128 GB.
* Not validated at the time of print; subject to change. For 4-rank memory,
please contact Tyan for recommended memory list.
Modifying the memory configuration for a M4881 is fairly simple by following a few
basic steps. The following terms are used in the memory modification description:
•
Bank – One or more DIMM's logically arranged to form a given memory bus
access width (64-bit or 128-bit).
•
Node – A Single processor, its memory controller and all of its associated
memory DIMM's and DIMM sockets. A node represents a given processor's
memory array as viewed from the HyperTransport ™ link.
•
Bank Interleave – This form of interleaving causes the memory controller to
group two 128-bit DIMM banks into one large array. Every other 128-bit word
is stored in a given DIMM bank. Even word addresses are stored in the bank
composed of slots DIMM0 and DIMM1. Odd word addresses are stored in the
bank composed of slots DIMM2 and DIMM3. If enabled in BIOS setup, each
node with four identical DIMM's is setup to use bank interleave.
•
Node Interleave – Node based interleaving causes the system to group even
numbers of nodes into one large array. In the case of two-way node
interleaving (2 processors present), every other 128-bit word is stored on a
given node. Four-way node interleaving (four processors present) results in
th
every 4 128-bit word being stored on a given node. Node interleave is not
compatible with Microsoft's SRAT table or Linux NUMA. If enabled in BIOS
setup and if all loaded nodes have the same amount of memory.
Rules for populating memory :
64-bit support: Choose DIMM slots 0 or 2 by themselves or use 0 and 2 together for
every CPU socket that corresponds to those DIMM slots.
128-bit support: Choose DIMM slots 0 and 1 or 2 and 3 or all 4 together for every
CPU socket that corresponds to those DIMM slots.
TM
processors support 64-bit (non-interleaved) or 128bit
http://www.TYAN.com
20
Memory