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945GC-M4 BIOS Manual
Hardware Prefetcher
T he processor has a hardw are prefetch er that automatically analy zes its requirements
and prefetches dat a and instructions from the memory into the Level 2 cache that are
likely to be required in the near future. T his reduces the latency associated with
memory reads.
Options: Enabled (Default) / Disabled
Adj acent Cache Line Prefetch
T he processor has a h ardw are adjacent cache line prefet ch mech anism that
automatically fetches an extra 64-byte cache line whenev er the processo r requests for
a 64-byte cach e line. T his reduces cach e latency by making the next cache line
immediately available if the processor requires it as well.
Options: Enabled (Default) / Disabled
Max CPUID Value Limit
When the computer is booted up, the operating system executes the CPUID
instruction to identify the processor and its capabilities. Befo re it can do so, it must
first query the processor to find out the highest input value CPUID recognizes. T his
determines the kind of basic information CPUID can provide the operating system.
Options:
Disabled (Default) / Enabled
SuperIO Configuration
Advanced
Confi gure ITE8718 Super IO Chi pset
OnBoa rd Floppy Con troller
Seria l Port1 Addre ss
Paral lel Port Addr ess
Par allel Port Mo de
Par allel Port IR Q
Keybo ard PowerOn
Mouse PowerOn
Resto re on AC Powe r Loss
vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc.
BIOS S ETUP UTILITY
[ Enabled]
[ 3F8/IRQ4]
[ 378]
[ Normal]
[ IRQ7]
[ Disabled]
[ Disabled]
[ Power Off]
8
Allo ws BIOS to E nable
or D isable Flopp y
Cont roller.
S elect Screen
S elect Item
C hange Option
+-
F1
G eneral Help
F1 0
S ave and Exit
ES C
E xit
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