Omron C1SD-PD page 309

Êîìàíäà
MOVE TIMER/ COUNTERPV
TO REGISTER
Ïðèìå÷àíèå: 1. Ïðè èñïîëüçîâàíèè îïåðàíäà äâîéíîé äëèíû, ïðèáàâüòå 1 ê çíà÷åíèþ, ïîêàçàííîìó â êîëîí-
êå «Äëèíà»
2. Íå ïîääåðæèâàåòñÿ ñèñòåìîé-D
9-5-7 Êîìàíäû ñìåùåíèÿ äàííûõ
Êîìàíäà
SHIFT REGISTER
REVERSIBLESHIFT
REGISTER
ASYNCHRONOUS
REGISTER
WORD SHIFT
ARITHMETIC SHIFT LEFT
DOUBLE SHIFT LEFT
ARITHMETIC SHIFT RIGHT
DOUBLE SHIFT RIGHT
ROTATE LEFT
DOUBLE ROTATE LEFT
ROTATE LEFT
CARRY
DOUBLE ROTATE
WITHOUT CARRY
ROTATE RIGHT
DOUBLE ROTATE RIGHT
ROTATE RIGHT WITHOUT
CARRY
DOUBLE ROTATE
WITHOUT CARRY
ONE DIGIT SHIFT LEFT
ONE DIGIT SHIFT RIGHT
SHIFT N-BIT DATA LEFT
SHIFT N-BIT DATA RIGHT
SHIFT N-BITS LEFT
DOUBLE SHIFT N-BITS LEFT NSLL
SHIFT N-BITS RIGHT
Ðàáîòà Ìîäóëÿ öåíòðàëüíîãî ïðîöåññîðà è äëèòåëüíîñòü öèêëà
Ìíåìîíèêà Êîä
MOVRW 561
Ìíåìîíèêà Êîä
SFT 010
SFTR 084
SHIFT ASFT 017
WSFT 016
ASL 025
ASLL 570
ASR 026
ASRL 571
ROL 027
ROLL 572
WITHOUT RLNC 574
LEFT RLNL 576
ROR 028
RORL 573
RRNC 575
RIGHT RRNL 577
SLD 074
SRD 075
NSFL 578
NSFR 579
NASL 580
582
NASR 581
Äëèíà (êîëè- Âðåìÿ âûïîëíåíèÿ (ìêñåê.)
÷åñòâî øàãîâ)
CPU6_H
3 0.42
186.4
Äëèíà (êîëè- Âðåìÿ âûïîëíåíèÿ (ìêñåê.)
÷åñòâî øàãîâ)
CPU6_H
3 7.4
433.2
4 6.9
615.3
4 6.2
1.22 ìñåê
4 4.5
171.5
2 0.22
2 0.40
2 0.22
2 0.40
2 0.22
2 0.40
2 0.22
2 0.40
2 0.22
2 0.40
2 0.22
2 0.40
3 5.9
561.1
3 6.9
760.5
4 7.5
7.5
4 50.5
7.4
3 0.22
3 0.40
3 0.22
– 310 –
Ãëàâà 9
Óñëîâèÿ
CPU6_S CPU4_S
–
Ïåðåäà÷à 255
áèòîâ.
Óñëîâèÿ
CPU6_S CPU4_S
Ñìåùåíèå îä-
íîãî ñëîâà.
Ñìåùåíèå
1000 ñëîâ.
Ñìåùåíèå îä-
íîãî ñëîâà.
Ñìåùåíèå
1000 ñëîâ.
Ñìåùåíèå îä-
íîãî ñëîâà.
Ñìåùåíèå
1000 ñëîâ.
Ñìåùåíèå îä-
íîãî ñëîâà.
Ñìåùåíèå
1000 ñëîâ.
–
–
–
–
–
–
–
–
–
–
–
–
Ñìåùåíèå îä-
íîãî ñëîâà.
Ñìåùåíèå
1000 ñëîâ.
Ñìåùåíèå îä-
íîãî ñëîâà.
Ñìåùåíèå
1000 ñëîâ.
Ñìåùåíèå îä-
íîãî áèòà.
Ñìåùåíèå
1000 áèòîâ.
Ñìåùåíèå îä-
íîãî áèòà.
Ñìåùåíèå
1000 áèòîâ.
–
–
–