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6-2. VCD MODE CONTROL IC PIN DESCRIPTION
(VX-97 BOARD IC305 HD6413002F10)
Pin No.
Pin Name
1
VCC
2
DSP CS
3
CDDA EMP
4
E2P WC
5
E2P CS
6
VFD ACK
7
VFD REQ
8
READY
9
MPEG RST
10
RESO
11
VSS
12
MECH SI
13
SO
14
MECH SO
15
SI
16
MECH CLK
17
SCK
18
DEV RST
19
H DET
20
MIC IN
21
OTASUKE
22
VSS
23
VCD
24
CLAP SW0
25
CLAP SW1
26
CLAP BUSY
27
D0
28
D1
29
D2
30
D3
31
D4
32
D5
33
D6
34
D7
35
VCC
36
A0
37
A1
38
A2
39
A3
40
A4
I/O
Power supply, REG +5V
–
O
Chip select for KARAOKE DSP ("L": Being communicated) (Not used)
CDDA de-emphasis control input ("H": ON).
I
Only when video CD is used, this pin is used due to CL480 bug. (Not used)
O
EEPROM line control output
O
EEPROM chip select output
I
Transfer enable signal to the mode controller from the VFD controller ("L": Communication enable)
O
Transfer request signal to the VFD controller from the mode controller ("L": Communication request)
I
Not used (Fixed at "H")
O
1852 MPEG reset ("L": Reset)
O
Not used
–
Ground
O
Data output to the mechanism controller/CG
O
Transfer data to the VFD controller/EEPROM
I
Data input from the mechanism controller
I
Reception data from the VFD controller/EEPROM
O
Communication clock output to the mechanism controller/CG
O
Communication clock to the VFD controller/EEPROM
O
Device reset ("L": Reset)
I
"L": Video input present (Not used)
I
"L": MIC IN (Not used)
"H": Microphone sound absent, "L": Microphone sound present (Fixed at "H")
I
–
Ground
O
Not used
O
"H": Hand clapping 0 START (Not used)
O
"H": Hand clapping 1 START (Not used)
I
"L": Hand clapping (Not used)
I/O
Data bus I/O
Data bus I/O
I/O
I/O
Data bus I/O
I/O
Data bus I/O
I/O
Data bus I/O
I/O
Data bus I/O
I/O
Data bus I/O
I/O
Data bus I/O
Power supply, REG +5V
–
O
Address bus output
O
Address bus output
Address bus output
O
O
Address bus output
O
Address bus output
6-3
Function
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