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Circuit Description
13-1-3 Control System Features
＊ 80C51 micro-controller core standard instruction set and timing
＊ 0.4883 ms machine cycle (6 clock cycles with 12.288 MHz derived from an xtal frequency of 24.576MHz)
＊ maximum 256k x 8-bit program ROM
＊ maximum of 8k x 8-bit auxiliary RAM
＊ auxiliary RAM page pointer
＊ 12-level interrupt controller for individual enable/disable with two level priority
＊ stand-by, idle and power-down modes
＊ watchdog timer
＊ two 16-bit timer/counters
＊ additional 24-bit timer (16-bit timer with 8-bit Pre-scaler)
＊ 16-bit data pointer
＊ five 6-bit pulse width modulator (PWM) outputs for control of TV analogue signals.
＊ one 14-bit PWM for voltage synthesis tuning control.
＊ 8-bit ADC with 4 multiplexed inputs.
＊ remote control pre-processor (RCP).
＊ I2C byte level bus interface.
＊ universal asynchronous receiver transmitter (UART)
＊ 24 General I/O.
13-1-4 Vertical Circuit (LA78045)
13-2
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