Table of Contents
Advertisement
Bit 6
This bit is a read/write bit that allows an interrupt to occur
at a rate specified by the rate and divider bits in Status
Register A. When set to 1, this bit enables the interrupt.
The system initializes this bit to O.
Bit 5
When set to 1, this bit enables the alarm interrupt. The
system initializes this bit to O.
Bit 4
When set to 1, this bit enables the update-ended interrupt.
The system initializes this bit to O.
Bit 3
When set to 1, this bit enables the square-wave frequency
as set by the rate-selection bits in Status Register A. The
system initializes this bit to O.
Bit 2
This bit indicates if the time-and-date calendar updates
use binary or binary-coded-decimal (BCD) formats. When
set to 1, this bit indicates a binary format. The system
initializes this bit to O.
Bit 1
This bit establishes if the hours byte is in the 24-hour or
12-hour mode. When set to 1, this bit indicates the 24-hour
mode. The system initializes this bit to 1.
Bit 0
When set to 1, this bit enables the daylight savings time
mode. When set to 0, it disables the mode, and the clock
reverts to standard time. The system initializes this bit to
O.
Model 50 System Board
3-17
Advertisement
Table of Contents
