Table of Contents
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I
110 address map
1-6
I/O function byte
2-8
identification, adapter
3-3
interrupt 0 reset
3-22
interrupts
K
keyboard (electrical)
1-7
M
map, memory
3-8
math coprocessor
1-4
memory
connectors
3-9
control register
2-9
map
3-8
memory module packages
3-7
performance
1-7
random access
3-7
read only
3-7
refresh
1-7
memory refresh
3-4
memory size miscompare
3-17
microprocessor
alternate reset
3-24
real address mode
3-23
miscellaneous ports
3-21
mode switch compatibility
3-24
model byte
1-3
modules, memory
3-7
N
NMI mask
3-11
NMI service
3-4
NMI signal
3-4
nonmaskable interrupt (NMI)
3-21
X-2
Index
p
parallel port
2-8
parity check enable
3-22
password, power-on
3-25
performance, system
1-7
pointing device (electrical)
1-7
port, system control
3-21, 3-23
POS
See programmable option select
power specifications (POS)
1-7
programmable option select
2-3
enable/setup register
2-7
registers
2-5
system board I/O byte
2-8
system board setup
2-6
system configuration
utilities
2-3
programming, arbiter
3-5
R
RAM enable
2-9
random access memory (RAM)
3-7
read-only memory
3-7
real mode addressing
3-23
real-time clock bytes
3-13
refresh
3-4, 3-7
refresh request
3-22
registers
card selected feedbaCk
2-6
enable/setup
2-7
memory control
2-9
miscellaneous system
3-21
port A
3-23
port B
3-21
POS
2-5,2-8
RT/CMOS and NMI mask
3-11
RT/CMOS status registers
3-13
reset, alternate
3-24
RT/CMOS address register
3-11
RT/CMOS RAM
3-10
password
3-23, 3-25
secured area
3-23
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Table of Contents
