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BII
Function
7
Reset Timer 0 Output Latch (I ROO)
6 - 4
Reserved
3
Enable Channel Check
2
Enable Parity Check
1
Speaker Data Enable
o
Timer
2
Gate to Speaker
Figure
3-21. System Control Port B (Write)
BII
Function
7
Parity Check
6
Channel Check
5
Timer 2 Output
4
Toggle with Each Refresh Request
3
Enable Channel Check
2
Enable Parity Check
1
Speaker Data Enable
o
Timer
2
Gate to Speaker
Figure
3-22. System Control Port B (Read)
Bit 7
Setting this bit to 1 during a write operation, resets
IRO O.
When this port is read and this bit is set to 1, a parity
check has occurred.
Bit 6
When this port is read and this bit is set to 1, a channel
check has occurred.
Bit 5
When this port is read, this bit indicates the condition of
the timer/counter 2 'output' signal.
Bit 4
When this port is being read, this bit toggles for each
refresh request.
Bit 3
Setting this bit to 0 enables channel check. It is set to 1
during a power-on reset.
Bit 2
Setting this bit to 0 enables parity checking. This bit is set
to 1 during a power-on reset.
Bit 1
Setting this bit to 1 enables speaker data. This bit is set to
o
during a power-on reset.
Bit 0
Setting this bit to 1 enables the timer 2 gate.
3-22
Model 60 System Board
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