Table of Contents
Advertisement
Circuit Diagrams and PWB Layouts
10-4-50
B07G, CPLD
CPLD
B07G
5GC1
+3V3
30R
5GC2
FGC2
+3V3
30R
9GC1
FPGA-SYS-CLK
AMBI-SPI-CSn
AMBI-SPI-MOSI
3GC1
AMBI-SPI-MISO
AMBI-SPI-CCLK
3GC3
AMBI-SPI-OUT-CSn
AMBI-TEMP
+3V3
DBG
1GC1
1
FGC3
2
3
4
5
FGC7
6
7
8
QFU2.1E LA
10.
FGC1
VINT
VIO
VINT
VIO
7GC1
XC9572XL-10VQG44C0100
Φ
VCCIO
VCCINT
43
IXO1_43|GCK1
44
IXO1_44|GCK2
1
IXO1_1|GCK3
2
5
IXO1_2
IXO3_5
3
6
IXO1_3
IXO3_6
39
7
IXO1_39
IXO3_7
33R
40
8
IXO1_40
IXO3_8
41
12
IXO1_41
IXO3_12
42
13
IXO1_42
IXO3_13
14
IXO3_14
36
16
IXO3_16
IXO2_36|GTS1
34
18
IXO2_34|GTS2
IXO3_18
33
IXO2_33|GSR
19
IXO4_19
29
20
IXO2_29
IXO4_20
30
21
IXO2_30
IXO4_21
33R
31
22
IXO2_31
IXO4_22
32
23
IXO2_32
IXO4_23
37
27
IXO2_37
IXO4_27
38
28
IXO2_38
IXO4_28
11
TCK
9
TDI
24
TDO
10
TMS
GND
FGC4
FGC5
FGC6
+3V3
EN 130
9GC2
3GC2
33R
3GC4
33R
3GC6
33R
back to
2013-Apr-05
div. table
BL-DIM
3D-LR
3D-LED_3D-RF
CPLD-LED0
CPLD-LED0
CPLD-LED1
CPLD-LED1
CPLD-LED2
CPLD-LED2
CPLD-LED3
CPLD-LED3
AMBI-SPI-OUT-CCLK
AMBI-SPI-OUT-MISO
AMBI-SPI-OUT-MOSI
CPLD
B07G
5
2011-12-16
8204 000 9222
19280_050_120322.eps
120322
Advertisement
Table of Contents
