Multiplexer Channel Simplified Logic Diagram - HP 3000 III Series Manual

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I/O System
°
TO lOP BUS
.._-----------------------.-JA. . . . . . - -----------------------. . . . . ,
T
T
C
DATA
DATA
POLL
POLL
7DEVN
OUT
IN
r -
- - - - - -
-
I
I
I
~
I
4
IOCMD
COMP
DECODER
ARATOR
I
TlO
I
TRANSFERI
CIO
8
I
WIO
CONTROL
WR RAMS
RIO
I
lOGIC
DEVNO
I
JUMPERS
4
~
I
DIAGNOSTIC
I
WR ORDER RAM
LOGIC
L _
- - -
--
-
-
-
~
INC ADDR
4
BITS 12·15
~
V
~
~
I
AUX
I
RAM
RAM
J,
IAI Blc
I
0
I
pC
I
DC
I
B121 B131 B141 B151
I
I
L--JI
l
l
l
L!R
1
U.OO. .
¢
Ie?
f
RR
L....-.,
I
}1
-----"-
ADDRESS RAM
HORDER
I
WORD COUNT
RAM
RAM
PRIORITY
::~~~ER/
_
~
~
~
DECODER
l-H
ADDRESS REG/COUNTER
I
O~r~R
I
:~~f'c83~~lA
~
-,TJ
I
I
I
SR
I
HAN SO
DEV END
ACKSR
DEVNO DB
CHAN ACK
SIO ENABLE
JUMP MET
TOGGLE INXFER
TOGGLE SR
MUX
oc:;c:a
E OUT XFER
BUS
OGGLE SIO OK
>-TO
MULTIPLEXER
REQ
DEVICE
PCMDI
CONTROLLER
CHANNEL
SET JMP
PSTATSTB
PCONTSTB
P WRITE STB
RD NEXTWD
P READ STB
,SET INT
EOT
SR CLOCK
Figure 7-16.
Multiplexer Channel Simplified Logic Diagram
7-31

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