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6.1.3.
FLASH PROM (SEE Fig. 18)
The 2 Mbit (IC5) Flash PROM contains the operational firmware for the microcontroller. It is interfaced to the
data/address/control bus using address lines A0 to A17, data lines D0 to D7, and chip select (pin 30), output enable (pin 32),
and write (pin 7).
6.1.4.
EEPROM (SEE Fig. 18)
The electrically erasable PROM PQVIT2464WM6 (IC9) is used to store all the temporary operating parameters for the base
(see EEPROM LAYOUT (BASE UNIT)). It uses a two-line serial data interface with the BBIC, with bi-directional data on pin 5
(TP104), and clock on pin 6 (TP103).
6.1.5.
SERIAL FLASH ROM
The 4Mbit (IC8) Serial Flash ROM contains the audio data for TAM operation.
It is interfaced to the clock/input/output using serial interface CS, SI and SO.
6.1.6.
CLOCK GENERATION (SEE Fig. 18)
A single clock generator in the BBIC uses an external crystal X1 to derive all clock frequencies used in the base. The crystal
is tuned to the exact frequency of 10.368 MHz during manufacture.
The BBIC provides a reference clock signal SYRI (IC6 pin 5, or TP101) which is used to drive the PLL circuitry in the RF
module. The basic data rate for TXDA (pin 12) and RXDA (pin 20) is 1.152 Mbits/s, which is 10.368MHz divided by 9.
6.1.7.
LOCATOR KEY (SEE Fig. 18)
The "Locator (Page)" button is connected to pin 71 (TP109) of the IC6. When pressed the base transmits a message to the
handset, which then beeps.
6.1.8.
FACTORY SERIAL PORT (SEE Fig. 18)
In order to communicate with the base band section during manufacture and servicing (using a PC) a serial data link has been
provided.
Serial data input/output is provided through the SDA terminal (J102). The data is clocked through using the SCL terminal
(J103). A ground terminal is provided by J104.
To invoke the external communication mode the MODE_SEL terminal (J101) must be connected to the 2.8V terminal (J100).
The serial port terminals J100 to J104 are connected to by means of test probe pads on the ground plane side of the pcb.
6.1.9.
BUZZER CIRCUIT (SEE Fig. 18)
A square-wave signal from IC6 pin 76 is used to sound the buzzer via switching transistor T1 (TP98). Various tones and
cadences are used dependent on function. Buzzer volume is varied by changing the duty cycle of the drive waveform. D16
provides quenching of back-emf generated when T6 turns off.
6.1.10. AUDIO PATH-RX AUDIO-LINE INPUT (SEE Fig. 18)
Audio from the line interface TXAF (TP97) enters the BBIC on pin 133. The audio signal passes through the analogue part of
the BBIC where it is amplified and converted to a digital audio stream signal. The burst mode controller processes this stream
performing encryption and scrambling, adding the various other fields to produce the GAP standard DECT frame, assigning to
a time slot and channel etc. to emerge on pin 12 as TXDA.
6.1.11. AUDIO PATH - TX AUDIO - LINE OUTPUT (SEE Fig. 18)
Audio from the receiver RXDA enters the BBIC on pin 20 as GAP standard DECT frames. It passes through the decoding
section burst mode controller where it separates out the frame information and performs de-encryption and de-scrambling as
required. It then goes to the DSP where it is turned back into analogue audio. This is amplified by the analogue front end and
emerges at pin 123 - i.e. the RXAF signal of the line interface.
19
KX-TCD725AXM
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