796. CI TS IN/OUT
FROM DEMOD TO CI CARD
S_CI_VCC_ENZ
S_CI_VCC_ENZ
791 793 794
From Demo
R_DATA7
R_DATA7
104 771
R_DATA6
R_DATA6
104 771
R_DATA5
R_DATA5
104 771
R_DATA4
R_DATA4
104 771
R_DATA3
R_DATA3
104 771
R_DATA2
R_DATA2
104 771
R_DATA1
R_DATA1
104 771
R_DATA0
R_DATA0
104 771
3.3VD
From Demo
R_TSVAL
R_TSVAL
104 771
S I G 1 7 9 3 0
R_TSSYC
R_TSSYC
104 771
S I G 1 7 9 2 6
R_TSCLK_CI
R_TSCLK_CI
104
[CL1G017]
[CL1G017]
IC794
IC794
2
4
1
2
A
A
Y
Y
R7950
R7950
33 OHM
33 OHM
5
3
3.3VD
[Vcc]
[Vcc]
[GND]
[GND]
1
NC
NC
NL17SZ17XV5T2G
NL17SZ17XV5T2G
3.3VD
ONSEMI
ONSEMI
LOGIC NL17SZ17XV5T2G SOT-553
LOGIC NL17SZ17XV5T2G SOT-553
2
1
C7963
C7963
0.1UF/10V
0.1UF/10V
TOSHIBA
TOSHIBA
IC797
IC797
TC74VHC244FK
TC74VHC244FK
[VHC244]
[VHC244]
1
EN1
EN1
19
EN2
EN2
2
18
1
S I G 1 7 9 4 0
S I G 1 4 3 6 4
[0]
[0]
1
1
3
4
16
5
S I G 1 7 9 3 7
S I G 1 4 3 6 5
S I G 1 4 3 6 6
[1]
[1]
1
1
7
6
14
S I G 1 7 9 3 6
[2]
[2]
1
1
8
12
S I G 1 7 9 3 8
S I G 1 4 3 6 7
[3]
[3]
1
1
11
9
1
S I G 1 7 9 3 5
S I G 1 4 3 6 8
[0]
[0]
2
2
3
13
7
5
S I G 1 7 9 4 1
S I G 1 4 3 6 9
S I G 1 4 3 7 0
[1]
[1]
2
2
7
15
5
S I G 1 7 9 2 4
[2]
[2]
2
2
17
3
S I G 1 7 9 2 5
S I G 1 4 3 7 1
[3]
[3]
2
2
20
10
[Vcc]
[Vcc]
[Vss]
[Vss]
2
1
S I
G
1 4
4 0
0
C7960
C7960
0.1UF/10V
0.1UF/10V
TOSHIBA
TOSHIBA
IC798
IC798
TC74VHC244FK
TC74VHC244FK
[VHC244]
[VHC244]
1
EN1
EN1
19
EN2
EN2
2
18
1
S I G 1 4 3 7 2
[0]
[0]
1
1
3
4
16
5
S I G 1 4 3 7 3
S I G 1 4 3 8 7
[1]
[1]
1
1
7
6
14
[2]
[2]
1
1
8
12
S I G 1 4 3 7 4
[3]
[3]
1
1
11
9
[0]
[0]
2
2
13
7
S I G 1 7 9 2 8
S I G 1 4 4 0 2
[1]
[1]
2
2
15
5
[2]
[2]
2
2
17
3
[3]
[3]
2
2
20
10
[Vcc]
[Vcc]
[Vss]
[Vss]
S I G 1 4 4 0 1
2
1
C7961
C7961
0.1UF/10V
0.1UF/10V
To CICARD
S_CICD_MDI7
S_CICD_MDI7
RM790A
RM790A
2
791
22 OHM
22 OHM
S I G 1 4 2 4 1
S_CICD_MDI6
S_CICD_MDI6
RM790B
RM790B
4
791
22 OHM
22 OHM
S I G 1 4 2 3 9
S_CICD_MDI5
S_CICD_MDI5
RM790C
RM790C
6
791
22 OHM
22 OHM
S I G 1 4 2 3 2
S_CICD_MDI4
S_CICD_MDI4
RM790D
RM790D
8
791
22 OHM
22 OHM
S I G 1 4 2 2 3
S_CICD_MDI3
S_CICD_MDI3
RM791A
RM791A
2
791
22 OHM
22 OHM
S I G 1 4 2 2 6
S_CICD_MDI2
S_CICD_MDI2
RM791B
RM791B
4
791
22 OHM
22 OHM
S I G 1 4 2 3 8
S_CICD_MDI1
S_CICD_MDI1
RM791C
RM791C
6
791
22 OHM
22 OHM
S I G 1 4 2 3 3
S_CICD_MDI0
S_CICD_MDI0
RM791D
RM791D
8
791
22 OHM
22 OHM
S I G 1 4 2 2 9
To CICARD
S_CICD_MIVAL
S_CICD_MIVAL
RM792A
RM792A
2
791
10 OHM
10 OHM
S I G 1 4 2 3 1
S_CICD_MISTRT
S_CICD_MISTRT
RM792B
RM792B
4
791
10 OHM
10 OHM
S I G 1 4 2 2 2
RM792C
RM792C
6
10 OHM
10 OHM
S_CICD_MCLKI
S_CICD_MCLKI
RM792D
RM792D
S I
8
G
1 4
791
10 OHM
10 OHM
S I G 1 4 2 3 7
3 8
6
S_CICD_MOVAL
S_CICD_MOVAL
791
S I G 1 4 1 9 4
S_CICD_MOSTRT
S_CICD_MOSTRT
791
S_CICD_MCLKO
S_CICD_MCLKO
791
S I G 1 4 2 4 3
3.3VD
FROM CI CARD TO MST CHIP
S_CICD_MDO7
S_CICD_MDO7
791
S_CICD_MDO6
S_CICD_MDO6
S I
791
G
1 4
S I G 1 4 1 8 5
1 8
S_CICD_MDO5
S_CICD_MDO5
9
791
S_CICD_MDO4
S_CICD_MDO4
S I
791
G
1 4
S I G 1 4 2 4 5
2 4
8
S_CICD_MDO3
S_CICD_MDO3
791
S_CICD_MDO0
S_CICD_MDO0
S I
791
G
1 4
S I G 1 4 1 9 8
S_CICD_MDO1
S_CICD_MDO1
2 4
2
791
S_CICD_MDO2
S_CICD_MDO2
S I
791
G
1 4
S I G 1 4 2 0 5
2 0
1
S I
S I
S I
S I
G
G
G
G
1 8
1 8
1 8
1 8
9 7
9 7
9 7
9 7
S I
1
1
1
1
G
1 8
9 7
2
5V_CICARD
5V_CICARD
S I
S I
G
G
1 8
1 8
9 7
9 8
3
2
S I G 1 4 1 9 6
1
2
R7921
R7921
NC
NC
0 Ohm
0 Ohm
[CL1G017]
[CL1G017]
IC799
IC799
1
2
2
4
A
A
Y
Y
R7905
R7905
10 OHM
10 OHM
5
3
[Vcc]
[Vcc]
[GND]
[GND]
1
NC
NC
NL17SZ17XV5T2G
NL17SZ17XV5T2G
ONSEMI
ONSEMI
LOGIC NL17SZ17XV5T2G SOT-553
LOGIC NL17SZ17XV5T2G SOT-553
2
1
C7962
C7962
0.1UF/10V
0.1UF/10V
M_TSI0DATA7
M_TSI0DATA7
RM793D
RM793D
7
8
104
33 Ohm
33 Ohm
S I G 1 7 9 2 7
M_TSI0DATA6
M_TSI0DATA6
RM793C
RM793C
5
6
104
33 Ohm
33 Ohm
S I G 1 7 9 3 3
M_TSI0DATA5
M_TSI0DATA5
RM793B
RM793B
3
4
104
33 Ohm
33 Ohm
S I G 1 7 9 3 9
M_TSI0DATA4
M_TSI0DATA4
RM793A
RM793A
1
2
104
33 Ohm
33 Ohm
S I G 1 7 9 2 9
M_TSI0DATA3
M_TSI0DATA3
RM794A
RM794A
1
2
104
33 Ohm
33 Ohm
S I G 1 7 9 2 2
M_TSI0DATA0
M_TSI0DATA0
RM794B
RM794B
3
4
104
33 Ohm
33 Ohm
S I G 1 7 9 3 4
M_TSI0DATA1
M_TSI0DATA1
RM794C
RM794C
5
6
104
33 Ohm
33 Ohm
S I G 1 7 9 3 2
M_TSI0DATA2
M_TSI0DATA2
RM794D
RM794D
7
8
104
33 Ohm
33 Ohm
S I G 1 7 9 4 2
5V_CICARD
S I
G
1 8
9 8
3
M_TSI0VALID
M_TSI0VALID
1
2
104
S I G 1 7 9 2 3
R7901
R7901
33 OHM
33 OHM
M_TSI0SYNC
M_TSI0SYNC
1
2
104
S I G 1 7 9 4 3
R7902
R7902
33 OHM
33 OHM
M_TSI0CLKI
M_TSI0CLKI
1
2
104
S I G 1 7 9 3 1
R7903
R7903
33 OHM
33 OHM
Title :
Title :
Title :
$+
$+
$+
- !.
- !.
- !.
Engineer:
Engineer:
Engineer:
CVP DM HW
CVP DM HW
CVP DM HW
MAIN BOARD
MAIN BOARD
MAIN BOARD
Size
Size
Size
Project Name
Project Name
Project Name
Custom
Custom
Custom
Date:
Date:
Date:
Tuesday, January 29, 2013
Tuesday, January 29, 2013
Tuesday, January 29, 2013
Sheet
Sheet
Sheet
796
796
796
of
of
of
Rev
Rev
Rev
1.00
1.00
1.00
76
76
76