Advertisement
PC-E500
pau
(Not used.)
(Not used.)
(Not used.)
Input
7. Low battery detection circuit
SiO PAK (Not used.)
Signal description
ROM ecard chip select signa! (active high)
Chip select signal for display chip (Active high)
Internal ROM chip enable signal
RAM card chip enable signal
internal RAM chip enable signal
Output
| Key strobe signal
2
Output
Input
SIO RD (Receive data)
Output
SIO SD (Send data)
Input
Input
CE-140F data input terminal
input
Input
Output
11 pin DIN
Output
11 pin DOUT
Output
11 pin 102
Output
11 pin 101
Input
11 pin ACK
Output
11 pin BUSY
-
(Not used.)
Output
Display power (converter) control signal
Output
Low battery voltage control signal
Input
SIO CS (Opponent side send enable)
Input
SIO CD (Opponent side send request)
come ineffective.
10000 ~ 1FFFF
00000 ~ O3FFF, 08000 ~ OBFFF
C0000 ~ FFFFF
40000 ~ 7FFFF
80000 ~ BFFFF
P-ch open output
P-ch open dutput
P-ch open output
P-ch open output
P-ch open output
CPU IRQ
GPU E3
N-ch open
Fig. 3
Voltage detection IC
operational description
Low battery detection circuit check
CAU level VCC — GND: 4.2V to 4.6V
STOP level VCC - GND: 3.8V to 4.2V
Advertisement
