Sony KDL-40T3500 Service Manual page 40

REGB F4 REGB / PPORT34
IOWRB N4
IOWRB / PPORT31
IORDB P2
IORDB / PPORT30
INPACKB G2 INPACKB / PPORT33
VS1B
R2 GPIO_VS1B / PPORT28
G1
CARD_RESET GPIO_RESET / PPORT32
IREQB K3
GPIO_IREQB / PPORT24
CD1B V1 GPIO_CD1B / PPORT26
CD2B C1 GPIO_CD2B / PPORT35
Y1
PCE1B(CE2B_2) / PPORT36
P3
PCE0B(CE2B_1) / PPORT27
IOIS16B B1 IOSI16B / PPORT25
BUF_MDO_STRT
BUF_MDO_STRT E4
STP1_STRT / PPORT38
BUF_MDO_EN
BUF_MDO_EN F2 STP1_EN / PPORT37
BUF_MDO_CLK
BUF_MDO_CLK H1 STP1_CLK / PPORT29
RDATA[0-15]
RDATA[15]
R1 RDATA15 / STP1_DAT7 / BOOT_NAND_SEL1
RDATA[14]
R3
RDATA14 / STP1_DAT6 / BOOT_NAND_SEL0
RDATA[13]
T1
RDATA13 / STP1_DAT5 / BOOTSEL1
RDATA[12]
T3 RDATA12 / STP1_DAT4 / BOOTSEL0
RDATA[11]
U1 RDATA11 / STP1_DAT3 / MINIBOOT
RDATA[10]
D1
RDATA10 / STP1_DAT2 / BWSEL
RDATA[9]
D2
RDATA9 / STP1_DAT1 / ROMBEND
RDATA[8]
C3 RDATA8 / STP1_DAT0 / MCLKSEL2
RDATA[7]
RDATA7 / MCLKSEL1
U2
RDATA[6]
RDATA6 / MCLKSEL0
R4
RDATA[5]
RDATA5 / VRCLKSEL1
V2
RDATA[4]
RDATA4 / VRCLKSEL0
W2
RDATA[3]
V4 RDATA3
RDATA[2]
RDATA2 / MRGMODE1
C2
RDATA[1]
RDATA1 / MRGMODE0
D4
RDATA[0]
RDATA0 / ENDIAN
E2
RADD[19-25]
RADD[25]
J1 RADD25 / HSD7 / EJTAG_MODE
RADD[24]
RADD24 / HSD6 / DINT_EN
G3
RADD[23]
RADD23 / HSD5 / DSYSELB
J4
RADD[22]
K4 RADD22 / HSD4 / PCI_MODE
RADD[21]
L2 RADD21 / HSD3 / PCI_SIZE1
RADD[20]
RADD20 / HSD2 / PCI_SIZE0
M2
RADD[19]
RADD19 / HSD1 / NAND_CS
N2
JL3106
L4 RADD18 / HSD0
JL3108
M4 RADD17 / PKTSTRT
JL3110
RADD16 / HSDE
J3
RADD[0-14]
JL3111
RADD15 / HSDCLK
H3
RADD[14]
RADD14
M1
RADD[13]
N1 RADD13
RADD[12]
K1 RADD12
RADD[11]
N3 RADD11
RADD[10]
RADD10
T2
RADD[9]
M3 RADD9
RADD[8]
L3 RADD8
RADD[7]
H4 RADD7
RADD[6]
RADD6
G4
RADD[5]
J2 RADD5
RADD[4]
H2 RADD4
RADD[3]
F1 RADD3
RADD[2]
RADD2
E3
RADD[1]
E1 RADD1
RADD[0]
D3 RADD0
R3124 XX
V3 FCSB1
R3125 47
FCSB0 K2 FCSB0
FWEB L1 FWEB
FOEB
FOEB P1
NAND_SEB
T4 NSEB
JL3115
NAND_RBB
W1 NRBB
NAND_CLE
U3 NCLE
NAND_ALE
U4 NALE
NAND_ALE,NAND_CLE,NAND_RBB
JL3116
AA18 GCSB3 / PPORT50
JL3117
Y18
GCSB2 / PPORT49
JL3118
Y2
GCSB1
CE1B P4 GCSB0
nCI_WAIT
F3 GRDYB
XX
R3118
nBOARD_RST
R3119 0
nMASTER_RESET AA11 RSTSWB
JL3120
Y10 RSTOUT
PWMOUT V7
PWMOUT
CLK27M M21
CLK27IN
+1V5D
N17 AVDDP
M17
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
J9 J10 J11 J12 J13 K9 K10 K11 K12 K13 L9 L10 L11 L12 L13 M9 M10 M11 M12 M13 N9 N10 N11 N12 N13
U11 U12 U13 V13
- 39 -
ABCK
AO0_BCK AA4
XX
R3145 AMCK
AO0_MCK W5
ATX V6
PAR / PPORT56 D20
FRAMEB / PPORT57 F19
IRDYB / PPORT58 F18
E21
TRDYB / PPORT59
STOPB / PPORT60 E19
GPIO[4] JL3103
IDSEL / PPORT61 H21
DEVSELB / PPORT62 E20
M18
REQB0 / PPORT63
GNTB0 / PPORT64 N19
PERRB / PPORT65 E18
B17
VDOE_VCK_IN / AD1 / PPORT70
VDOE_VVSB_IN / AD2 / PPORT71 C17
VDOE_VHSB_IN / AD3 / PPORT72 D17
VDOE_VCK / SERRB / PPORT66
D21
VDOE_VVSB_OUT / INTAB / PPORT67
M20
VDOE_VHSB_OUT / PCICLK / PPORT68
K21
VDOE_FLD / AD0 / PPORT69
A17
VDOE_A7 / AD11 / PPORT80
C18
VDOE_A6 / AD10 / PPORT79 B21
VDOE_A5 / AD9 / PPORT78
A21
VDOE_A4 / AD8 / PPORT77
B20
VDOE_A3 / AD7 / PPORT76 A20
VDOE_A2 / AD6 / PPORT75 A19
VDOE_A1 / AD5 / PPORT74
B18
VDOE_A0 / AD4 / PPORT73
A18
JL3104
GPIO[3]
G20
VDOE_R7 / AD19 / PPORT88
VDOE_R6 / AD18 / PPORT87 G19
VDOE_R5 / AD17 / PPORT86 G18
JL3105
GPIO[0]
VDOE_R4 / AD16 / PPORT85 F21
VDOE_R3 / AD15 / PPORT84 D18
VDOE_R2 / AD14 / PPORT83 C21
VDOE_R1 / AD13 / PPORT82 C20
VDOE_R0 / AD12 / PPORT81 C19
VDOE_G7 / AD27 / PPORT96 K18
GPIO[6] JL3107
VDOE_G6 / AD26 / PPORT95 J21
GPIO[7] JL3109
J20
VDOE_G5 / AD25 / PPORT94
VDOE_G4 / AD24 / PPORT93 J19
JL3112
GPIO[5]
VDOE_G3 / AD23 / PPORT92 H20
VDOE_G2 / AD22 / PPORT91 H19
H18
VDOE_G1 / AD21 / PPORT90
JL3113
GPIO[2]
VDOE_G0 / AD20 / PPORT89 G21
VDOE_B7 / CBE3 / PPORT104 J18
JL3114
GPIO[1]
F20
VDOE_B6 / CBE2 / PPORT103
VDOE_B5 / CBE1 / PPORT102 D19
VDOE_B4 / CBE0 / PPORT101 B19
VDOE_B3 / AD31 / PPORT100 L19
VDOE_B2 / AD30 / PPORT99 L18
VDOE_B1 / AD29 / PPORT98 K20
VDOE_B0 / AD28 / PPORT97 K19
FB3103
V21
VDO0_D7 / PPORT23
FB3104
V20
VDO0_D6 / PPORT22
FB3105
VDO0_D5 / PPORT21 W21
FB3106
W20
VDO0_D4 / PPORT20
FB3107
Y21
VDO0_D3 / PPORT19
FB3108
Y20
VDO0_D2 / PPORT18
FB3109
VDO0_D1 / PPORT17 AA21
FB3110
VDO0_D0 / PPORT16 AA20
R3126 0
FB3111
V19
VDO0_VCK / PPORT15
FB3112
Y19
VDO0_FLD / PPORT12
Y VAR V11
V12
U VAG
W12
V VAB
AA12
VAY
VAC AA13
Y12
VACVBS
VREF1 W13
VREF0 Y11
RSET1 Y13
RSET0 W11
AVDDV V14
THESE CAPACITORS
TO BE PLACED
AVDDV W14
UNDERNEATH BGA
AVDDV
Y14
AVDDV AA14
W10 V10 AA10 Y9 W9 W8 AA9
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
JTCK,JTDI,JTDO,JTMS,JTRST,NMI_EDINT
~ FEE Board Schematic Diagram [ Digital Micro Processor ] Page 1B/6 ~
ATX
0uH VDO[7]
0uH
VDO[6]
0uH VDO[5]
0uH VDO[4]
0uH VDO[3]
0uH
VDO[2]
0uH VDO[1]
0uH VDO[0]
0uH VDCLK
VDCLK,VDO[0-7]
XX VDO_FLD
VDO_FLD
YUV_Y
YUV_U
YUV_V
YC_Y
YC_C
CVBS
FB3113
0uH
+3V3D