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J1
to Tel_Line
Bridge
A
Rect D2
B
Bell/Caller ID
Interface
Limit
Register
VUNREG
J2
4.0V
to AC Adaptor
Reg.
4.0V
2.65V
Reg.
2.65V
Hook Switch
Audio
Q2, Q3
LED
HOOK
DTXAF
DTXAF
Flash
A00-A18
CHARGE
Memory
CS, OE, WR
CONTACT
D0~D7
IC4
SCL
EEPROM
6
IC1
SDA
5
TXAF
43
A/D
Speech Encoding
37
RXAF
D/A
Speech Decoding
Analog
ADPCM
Front End
Codec Filter
71
95
40
42
CPU
64
63
Burst Building
Burst Decoding
RF
BMC
Interface
DSP
BBIC
IC2
KX-TCD455GM BLOCK DIAGRAM (BASE UNIT)
ANT1
ANT2
15
TXDA
4
33
8
RXDA
20
46
RSSI
5
20
SYRI
13
99
IC3
100
SYEN
10
10
RF Module
XTAL
X1
28
10.368
MHz
25
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