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Sense Byte 10
Bit
0
2
3
4
5
Designation
Command Status Reject
Spare
Control Status 'Reject
Write TM or Record
Not Detected Block
Read Back Check
Dynamic Reversal
Check
Tach Start Failure
6
Spare
7
Velocity Check
Sense Byte 11 (MAL 1 ROS/MP Errors)
Bit
0
2
3
4
5
Designation
'B' Bus Parity
Error MP 1
Spare
Low ROS Parity /Low
IC Parity on Branch
Instruction (BU or BOC)
Hi IC/BR Cond/Hi
ROS Register Parity
Microprogram Detected
Hardware Error
'D' Bus Parity MP 1
6
Spare
7
Br Cond Error MP 1
46
3803-2/3420 Subsystem Description
Interpretation
Present when tape unit fails to return the proper
command status.
Present when tape unit fails to return the proper control
status.
Present when the record or tape mark written cannot be
spaced over.
Present when the tape control loses control of tape
position during dynamic reversal on write.
Present when no change is detected in the tachometer
status within a specified length of time during start
delay.
Present when the tape unit does not attain and/ or
maintain proper velocity during write delay.
Interpretation
Present when 'B' bus parity is incorrect on a transfer of
an LSR contents to any external register (except to the
'A' register).
Present when:
1. Bad parity is detected in ROS Register bits 8 through
15.
2. :Bad parity is detected in the instruction counter (bits
8
through
15)
during a branch operation (BU or
BOC).
Present if:
1.
ROS register bits
0
through
7
have bad parity.
2. Page register bits 4 through 7 have bad parity.
3. An even number of the total branch conditions of
MP
1
is met during execution of a BOC instruction.
Present when the microprogram detects a malfunction in
MP 1.
Example: Incorrect branch condition during MP 1
checkout.
Present when even parity is detected on the "D" bus.
Present if an even number of branch conditions is
detected during test of one half of the branch conditions.
Note: The branch conditions tested for this error are
also tested along with all others, and bit 3 of this sense
byte is set if an even number is detected.
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