Philips 32PFL3008/56 Service Manual page 29

Chassis tps10.1a la
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7.3
DC/DC Converters
The on-board DC/DC converters deliver the following voltages
(depending on set execution):
+5V-STANDBY, permanent voltage for the Stand-by
controller, LED/IR receiver and controls
+3V3-STANDBY, power supply for LED/IR receiver and
controls
+12V, input from the power supply for the panel common
(active mode); connector CN403 pins 28, 29, 30.
+24V, input from the power supply for audio amplifier;
connector CN9902 pins 5 and 6.
+1V2, from the power supply for the scaler IC MST6931.
+5V_Standby
FB701
P24V
FB701
P12V
Q401
+5V_Standby
A04449
7.4
Front-End Analogue ATV reception
7.4.1
Front-End Analogue
The Front-End for the analogue tuner consist of the following
key components:
TUNER China DT21WN-2-E
SCALER MST6931XP-Z1-VB EPLQFP-128
Below find a block diagram of the front-end application for
analogue.
Circuit Descriptions
U701
AP7323
U702
AZ1117D
Q701
3401
PVDD
AMP TPA3110D
PANEL_VCC
Figure 7-4 DC/DC converters
back to
div. table
TPS10.1A LA
+1V8, supply voltage for DDR2 (diagram B03B)
+3V3, general supply voltage
+3.3V-TUN, supply voltage for tuner
+5V, supply voltage for Headphone AMP
+5V-USB, input intermediate supply voltage for USB
+3V3 from the power supply for the scaler IC MST6931
Figures gives a graphical representation of the DC/DC
converters with its current consumptions:
+1.2V_VDDC
FB401
FB403
FB404
FB405
+3.3V_Standby
FB406
VDD
FB407
Earphone
Pre-AMP
U703
PVD
1084P-ADJ
+5V_Normal
U704
APL3511
SAWless with ATV mode
DT21WN-2-E
I
2
C
IF_AGC
int.
Hi-Z
RF_AGC
X
RF_AGC
Figure 7-5 Front-End analogue block diagram
7.5
HDMI
Refer to figure
7-6 HDMI input configuration
7.
EN 29
VDDC
VDD33
AVDD ADC
VDD33 DMPLL
AVDD33 DEMOD
AU33
FOR SPI Flash
+1.8V_DDR
AVDD DDR
FB408
USB_5V
19450_203_130128.eps
2
I
C
IF
IF_AGC is no use
X
RF_AGC
MST6931
19450_204_130128.eps
for the application.
2013-Jul-05
130129
130129

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