Figures
1
2
Typical Test Setup ............................................................................................... 8
3
4
5
MII Ports 0 and 1................................................................................................. 20
6
MII Ports 2 and 3................................................................................................. 21
7
MII Ports 4 and 5................................................................................................. 22
8
MII Ports 6 and 7................................................................................................. 23
9
Twisted-Pair Ports 0 and 1.................................................................................. 24
10
Twisted-Pair Ports 2 and 3.................................................................................. 25
11
Twisted-Pair Ports 4 and 5.................................................................................. 26
12
Twisted-Pair Ports 6 and 7.................................................................................. 27
13
Fiber Interface ..................................................................................................... 28
14
LED/CONFIG Ports 0 - 3..................................................................................... 29
15
LED/CONFIG Ports 4 - 7..................................................................................... 30
16
Serial LED 1 ........................................................................................................ 31
17
Serial LED 2 ........................................................................................................ 32
18
Serial LED 3 ........................................................................................................ 33
19
MII Converter FPGAs.......................................................................................... 34
20
QSTAT FPGA ..................................................................................................... 35
21
Capacitors ........................................................................................................... 36
22
Clock ................................................................................................................... 37
Tables
1
2
3
4
5
6
7
8
MDIO Routing ..................................................................................................... 13
9
10
MII Port Speed Select ......................................................................................... 14
11
12
13
Serial LED Outputs ............................................................................................. 15
14
15
16
17
iv
LXD9781 PQFP Demo Board with FPGAs for RMII-to-MII Conversion Developer Manual