Sharp LC-37GD9E Service Manual page 95

LC-26GA5E
LC-32GD9E
LC-32GA5E
LC-37GD9E
ADVANCE INFORMATION
2.7. IC3301 (RH-IXB064WJN1Q)
2.7.1. FRC Block Diagram
CLKF20
UVIN0
126
UVIN1
127
UVIN2
128
ISS
UVIN3
129
UVIN4
137
UVIN5
138
UVIN6
139
UVIN7
140
CLKIN
14
ITU656/ITU601
HIN 10
Decoder
5
VIN
AVI
17
656I0/
142
YIN0
656I1/
3
YIN1
656I2/
4
YIN2
656I3/
8:4:4
6
YIN3
8:8:8
656I4/
7
YIN4
656I5/
11
YIN5
656I6/
12
MUX
YIN6
656I7/
13
YIN7
656I02
117
DCE
656I12
118
656I22
119
656I32
120
Contrast
656I42
121
656I52
122
656I62
123
LSE
CTE
656I72
124
CLKIN2
125
Test-controller,
Memory bist
113 115 111
TDO TCLK TMS
Fig. 1–5: Detailed Block Diagram of FRC 94xxA (package PMQFP144-4)
Micronas
XOUT XIN
24 23
61
648 MHz
clock
Xtal
Oscillator
648 MHz
ISM LL-PLL
DTO
Clock Sync Generation
Noise
H-/V-
Reduction
Prescaler
Global
Motion-,
Local Motion
Still-,
Detection
Stock-
Detection
Filmmode
Detection
Input Processing
8:8:8
Frame
Generator
Pattern
Generator
Pixel-
mixer
Curtain
Generator
Brightness
Chip Control
I 2 C C800
Interface Controller
to pin 33/78
114 105 106
116
INTR
TDI SCL SDA
June 4, 2004; 6251-603-3AI
Free-running Clocks
Divider
Line-locked Clocks
Divider
Output Processing
Motion
Tracking
Vector
Memory
eDRAM
Line
Block
Converter
Memory
Controller
H-postscaler
FRC 9419A
FRC 9428A
FRC 9429A
H-panorama
Generator
FAMOUS
Display Processing
Matrix
Saturation NCE
Tint
SVM
GAIN GAIN
Control
SVM DAC Y DAC
39 88
RESET
ASVMOUT AYOUT
98
FRC 94xxA
CLKOUT VOUT HOUT AVO/INTR
36 34 35 33
Output
Sync
Controller
Output
Data
Controller
Frame
Rate
Interpolation
Block
Line
Converter
V-postscaler
4:2:2
2D LSE
MEX
V-panorama
Generator
ITU656
ITU601
Encoder
Bit
Reduction
Delay Adjust
GAIN GAIN
U DAC V DAC
94 91 97
AUOUT AVOUT
RGBOUT9
27
RGBOUT8
28
RGBOUT7
29
RGBOUT6
30
RGBOUT5
31
RGBOUT4
32
RGBOUT3
40
RGBOUT2
41
RGBOUT1
42
RGBOUT0
43
YOUT9
44
YOUT8
45
YOUT7
46
YOUT6
52
YOUT5
53
YOUT4
55
YOUT3
57
YOUT2
58
YOUT1
59
YOUT0
60
UVOUT9
62
UVOUT8
67
UVOUT7
68
UVOUT6
73
UVOUT5
76
UVOUT4/INTR
78
81 UVOUT3
UVOUT2
82
UVOUT1
83
UVOUT0
84
13