2. Introduction to the TMDSEVM6678L board
This chapter provides an introduction and details of interfaces for the TMDSEVM6678L
board. It contains:
2.1 Memory Map
2.2 EVM Boot mode and Boot configuration switch settings
2.3 JTAG ‐ Emulation Overview
2.4 Clock Domains
2.5 I2C boot EEPROM / SPI NOR Flash
2.6 FPGA
2.7 Gigabit Ethernet PHY
2.8 Serial RapidIO (SRIO) Interfaces
2.9 DDR3 External Memory Interfaces
2.10 16‐bit Asynchronous External Memory Interface
2.11 HyperLink Interface
2.12 PCIe Interface
2.13 Telecom Serial Interface Port (TSIP)
2.14 UART Interfaces
2.15 Module Management Controller for IPMI
2.16 Additional Headers
2.1 Memory Map
The memory map of the TMS320C6678 device is as shown in Table 1. The external memory
configuration register address ranges in the TMS320C6678 device begin at the hex address
location 0x7000 0000 for EMIFA and hex address location 0x8000 0000 for DDR3 Memory
Controller.
15